mc68hc916y3 Freescale Semiconductor, Inc, mc68hc916y3 Datasheet - Page 124

• Manufacturer Part Number: mc68hc916y3
• Description: Mc68hc16y3 16 Bit Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

5.4 System Protection
5.4.1 Reset Status
5.4.2 Bus Monitor
5-16
MOTOROLA
The system protection block preserves reset status, monitors internal activity, and
provides periodic interrupt generation. Figure 5-7 is a block diagram of the
submodule.
The reset status register (RSR) latches internal MCU status during reset. Refer to
5.7.10 Reset Status Register for more information.
The internal bus monitor checks data size acknowledge (DSACK) signal response
times during normal bus cycles. The monitor asserts the internal bus error (BERR) sig-
nal when the response time is excessively long.
DSACK response times are measured in clock cycles. Maximum allowable response
time can be selected by setting the bus monitor timing (BMT[1:0]) field in the system
protection control register (SYPCR). Table 5-4 shows the periods allowed.
CLOCK
2
9
PRESCALER
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure 5-7 System Protection
SPURIOUS INTERRUPT MONITOR
Go to: www.freescale.com
MODULE CONFIGURATION
RESET STATUS
HALT MONITOR
BUS MONITOR
AND TEST
SOFTWARE WATCHDOG TIMER
PERIODIC INTERRUPT TIMER
MC68HC16Y3/916Y3
RESET REQUEST
BERR
RESET REQUEST
IRQ[7:1]
USER’S MANUAL
SYS PROTECT BLOCK