mc68hc916y3 Freescale Semiconductor, Inc, mc68hc916y3 Datasheet - Page 379

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mc68hc916y3

Manufacturer Part Number
mc68hc916y3
Description
Mc68hc16y3 16 Bit Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
D.1 Central Processing Unit
MC68HC16Y3/916Y3
USER’S MANUAL
This appendix contains address maps, register diagrams, and bit/field definitions for
MC68HC16Y3/916Y3 MCUs. More detailed information about register function is pro-
vided in the appropriate sections of the manual.
Except for central processing unit resources, information is presented in the intermod-
ule bus address order shown in Table D-1.
Control registers for all the modules in the microcontroller are mapped into a 4-Kbyte
block. The state of the module mapping (MM) bit in SCIMCR determines where the
control registers block is located in the system memory map. When MM = 0, register
addresses range from $7FF000 to $7FFFFF; when MM = 1, register addresses range
from $FFF000 to $FFFFFF.
With the CPU16, ADDR[23:20] follow the logic state of ADDR19 unless driven exter-
nally. MM corresponds to IMB ADDR23. If it is cleared, the SCIM2 maps IMB modules
into address space $7FF000 – $7FFFFF, which is inaccessible to the CPU16. Mod-
ules remain inaccessible until reset occurs. The reset state of MM is one, but the bit is
onetime writable. Initialization software should make certain it remains set.
CPU16 registers are not part of the module address map. Figure D-1 is a functional
representation of CPU resources.
16K, 48K, and 32K FLASH EEPROM
2K SRAM (MC68HC916Y3)
MRM (MC68HC16Y3 only)
4K SRAM (MC68HC16Y3)
(MC68HC916Y3 only)
(MC68HC916Y3 only)
TPUFLASH
Module
SCIM2
MCCI
TPU2
QSM
ADC
GPT
APPENDIX D REGISTER SUMMARY
Freescale Semiconductor, Inc.
For More Information On This Product,
Table D-1 Module Address Map
Go to: www.freescale.com
REGISTER SUMMARY
(Bytes)
Size
128
512
256
512
32
32
64
64
8
8
2
$YFFA00
$YFFB00
$YFFB00
$YFFC00
$YFFE00
$YFF820
$YFF800
$YFF700
$YFF400
$YFF900
$YFF860
Address
Base
MOTOROLA
D-1

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