mc68hc916y3 Freescale Semiconductor, Inc, mc68hc916y3 Datasheet - Page 484

• Manufacturer Part Number: mc68hc916y3
• Description: Mc68hc16y3 16 Bit Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Background
Basic operand size 5-27
Baud
BC D-90
BCD 4-6
BEFLASH
BERR 5-29, 5-33, 5-35, 5-37
BG 5-38, 5-64
BGACK 5-38, 5-64
BH D-90
Binary
BITS D-55
Bits per transfer
BITSE 11-21, D-60
Bit-time 11-26, 12-18
BKPT 4-42, 5-33, 5-54
BKPT (TPU asserted) D-90
BL D-90
BLC D-89
Block size (BLKSZ) 5-64, D-20
BM D-90
BME 5-17, D-14
BMT 5-16, D-14
BOOT 7-3, D-28
Boot ROM control (BOOT) D-28
Bootstrap words (ROMBS) 7-1
BP D-90
BR 5-38, 5-64
Branch latch control (BLC) D-89
Break frame 11-27, 12-18
Breakpoint
MOTOROLA
I-2
enable bit 5-66, D-23
debug mode 4-40, 4-42, 5-33
clock 11-27, 12-19
rate generator 11-2
features 3-2
coded decimal (BCD) 4-6
-weighted capacitors 10-6
encoding field 11-19
enable (BITSE) D-60
field (BITS) D-55
encoding 5-65, D-20
acknowledge cycle 5-33
asserted flag (BKPT) D-90
enable bits D-90
exceptions 4-40
flag (PCBK) D-91
hardware breakpoints 5-33
commands 4-43
connector pinout 4-45
enabling 4-42
entering 4-43
recommended connection 4-45
serial
sources 4-42
I/O block diagram 4-45
interface 4-44
–B–
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Breakpoints 4-41
Brushless motor commutation (COMM) 14-13
BT D-90
Buffer amplifier 10-5
Built-in emulation memory C-1
Bus
BYTE (upper/lower byte option) 5-66, D-21
C 4-4, D-3
Capture/compare unit 13-1
Carry flag (C) 4-4, D-3
CCF D-44
CCL D-90
CCR 4-4, D-3
CCTR D-44
CD/CA D-41
CDAC 10-23
Central processing unit (CPU16). See CPU16 4-1
CF 10-23
CFORC 13-8, 13-14, 13-15, D-82
CFSR D-92
CH D-91, D-93, D-94
CHANNEL D-92
Channel
mode selection 5-49
operation 5-34
arbitration for a single device 5-39
cycle
error
exception control cycles 5-35
grant (BG) 5-38
grant acknowledge (BGACK) 5-38
monitor 5-16
request (BR) 5-38
state analyzer 4-40
block diagram 13-12
clock output enable (CPROUT) bit D-81
conditions latch (CCL) D-90
control registers 14-16
function select registers 14-16
interrupt
orthogonality 14-4
priority registers 14-18
register breakpoint flag (CHBK) D-91
regular 5-29
terminations for asynchronous cycles 5-36
exception processing 5-36
signal (BERR) 5-16, 5-25, 5-36
timing of 5-36
external enable (BME) D-14
timeout period 5-17
timing (BMT) 5-16, D-14
base vector (CIBV) D-91
enable
request level (CIRL) D-91
status (CH) D-94
/disable field (CH) D-91
and status registers 14-16
–C–
MC68HC16Y3/916Y3
USER’S MANUAL