mc68hc916y3 Freescale Semiconductor, Inc, mc68hc916y3 Datasheet - Page 199

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mc68hc916y3

Manufacturer Part Number
mc68hc916y3
Description
Mc68hc16y3 16 Bit Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
MC68HC16Y3/916Y3
USER’S MANUAL
CALCULATE NEW
t
epk
NOTES:
1. SEE ELECTRICAL CHARACTERISTICS FOR V
2. THE MARGIN FLAG IS A SOFTWARE-DEFINED FLAG THAT INDICATES WHETHER
THE PROGRAM SEQUENCE IS GENERATING ERASE PULSES OR MARGIN PULSES.
PROGRAM/ERASE/VERIFY LEVEL
REGISTERS TO VERIFY ERASE
N
INCREMENT n
READ ARRAY AND SHADOW
Freescale Semiconductor, Inc.
START ERASE PULSE
CLEAR n
CLEAR MARGIN FLAG
OR CONTROL BLOCK
n
REDUCE V FPE TO
WRITE TO ARRAY
DELAY FOR t
START t
ep
For More Information On This Product,
ALL LOCATIONS
TIMER (t
DELAY FOR t
CLEAR ENPE,
ARRAY FAILED
MARGIN FLAG
COUNTER = 5 ?
SET ERAS
SET ENPE
SET LAT,
TO ERASE
ERASED ?
ep
SET ?
pr
ep
COUNTER,
epk
TIMER
N
N
COUNTER
Y
Figure 8-2 Erasure Flow
)
epk
FLASH EEPROM MODULE
pr
Go to: www.freescale.com
2
Y
Y
1
SET MARGIN FLAG
CALCULATE EM,
FPE
PIN VOLTAGE SEQUENCING.
SET t
epk
= EM
NORMAL READ LEVEL,
EXIT ERASE ROUTINE
REDUCE VFPE TO
FEEPROM PGM FLOW2 TD
CLEAR LAT
MOTOROLA
1
8-7

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