mc68hc916y3 Freescale Semiconductor, Inc, mc68hc916y3 Datasheet - Page 478

• Manufacturer Part Number: mc68hc916y3
• Description: Mc68hc16y3 16 Bit Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

ASPC[1:0] — TPUFLASH Array Space
TME — TPU Mode Enable Shadow
TPU — TPU Status Flag
BUSY — TPUFLASH Busy Flag
D-100
MOTOROLA
If the reset state of LOCK is zero, it can be set once after reset to allow protection of
the registers after initialization. Once the LOCK bit is set by software, it cannot be
cleared again until after a reset.
Since all TPUFLASH control registers are write-protected while in TPU mode, this bit
has no effect. LOCK = 1 does not prevent programming shadow locations.
Because the CPU16 operates only in supervisory mode, ASPC1 must remain set to
one for array accesses to take place. The field can be written only if LOCK = 0 and
STOP = 1. During reset, ASPC[1:0] takes on the default value programmed into the
associated shadow register. Refer to Table D-64.
When TME is set to zero, the TPUFLASH functions similar to a TPUROM. This bit is
not a TFMCR register bit, but a bit in the shadow register that corresponds to the TFM-
CR. This bit cannot be read normally. To read this bit, the user must follow the same
procedure used to read a shadow register.
0 = TPUFLASH is in IMB mode.
1 = TPUFLASH is in TPU mode.
This bit is read-only.
This bit is intended as a warning flag for the case when a user tries to program the
TPUFLASH while it is in TPU mode. This operation is illegal. To indicate this, the TPU-
FLASH sets this bit. This informs the user that the TPUFLASH is “busy” providing mi-
crocode to the TPU2.
This bit is read-only.
0 = The TPUFLASH automatically sets the EMU bit in the TPUMCR coming out of
1 = The TPUFLASH starts normally. The EMU bit in the TPUMCR must be set to
0 = Either the TPUFLASH is available for microcode access or is not needed for
1 = TPUFLASH is in TPU mode, but is not available. This can occur if the LAT bit
reset.
enter TPU mode.
microcode access.
in the TFCTL register is set and the TPU2 is requesting data from the TPU-
FLASH.
ASPC[1:0]
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Table D-64 Array Space Encoding
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Supervisor program and data space
Supervisor program space
Type of Access
MC68HC16Y3/916Y3
USER’S MANUAL