mc68hc916y3 Freescale Semiconductor, Inc, mc68hc916y3 Datasheet - Page 151

• Manufacturer Part Number: mc68hc916y3
• Description: Mc68hc16y3 16 Bit Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

5.7.3.2 Data Bus Mode Selection
MC68HC16Y3/916Y3
USER’S MANUAL
All data lines have weak internal pull-up devices. When pins are held high by the
internal pull-ups, the MCU uses a default operating configuration. However, specific
lines can be held low externally during reset to achieve an alternate configuration.
Use an active device to hold data bus lines low. Data bus configuration logic must
release the bus before the first bus cycle after reset to prevent conflict with external
memory devices. The first bus cycle occurs ten CLKOUT cycles after RESET is
released. If external mode selection logic causes a conflict of this type, an isolation
resistor on the driven lines may be required. Figure 5-17 shows a recommended
method for conditioning the mode select signals.
The mode configuration drivers are conditioned with R/W and DS to prevent conflicts
between external devices and the MCU when reset is asserted. If external RESET is
asserted during an external write cycle, R/W conditioning (as shown in Figure 5-17)
prevents corruption of the data during the write. Similarly, DS conditions the mode con-
figuration drivers so that external reads are not corrupted when RESET is asserted
during an external read cycle.
External bus loading can overcome the weak internal pull-up drivers
on data bus lines and hold pins low during reset.
Freescale Semiconductor, Inc.
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NOTE
MOTOROLA
5-43