mc68hc916y3 Freescale Semiconductor, Inc, mc68hc916y3 Datasheet - Page 333

• Manufacturer Part Number: mc68hc916y3
• Description: Mc68hc16y3 16 Bit Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

MC68HC16Y3/916Y3
USER’S MANUAL
NOTES:
10. Use of an active pulldown device is recommended.
11. Total operating current is the sum of the appropriate I
12. Current measured at maximum system clock frequency, all modules active.
13. The MC68HC16Y3/916Y3 can be ordered with either a a 32.768 kHz crystal reference or a 4.194 MHz crystal
14. The RAM module will not switch into standby mode as long as V
15. When V
16. Power dissipation measured with system clock frequency of 16.78 MHz, all modules active. Power dissipation
1. Applies to :
2. This parameter is periodically sampled rather than 100% tested.
3. Applies to all input-only pins except ADC pins.
4. Input-Only Pins: BKPT/DSCLK, EXTAL, PAI, PCLK, TSC
5. Applies to all input/output and output pins.
6. Does not apply to HALT and RESET because they are open drain pins. Does not apply to Port D and Port MCCI
7. Applies to Group 1, 2, 4 input/output and all output pins.
8. Applies to Group 1, 2, 3, 4 input/output pins, BG/CS, CLKOUT, CSBOOT, FREEZE/QUOT, and IPIPE0.
9. Applies to DATA[15:0].
reference as a mask option.
volts. The RAM array cannot be accessed while the module is in standby mode.
causes standby current to increase toward the maximum transient condition specification. System noise on
the V
can be calculated using the following expression:
I
Port ADA[7:0] — AN[7:0]
Port A: PA[7:0]/ADDR[18:11]
Port B: PB[7:0]/ADDR[10:3]
Port D: PD5/PCS2, PD4/PCS1, PD3/PCS0/SS, PD3/SCK, PD1/MOSI, PD0/MISO
Port E: PE[7:6]/SIZ[1:0], PE5/AS, PE4/DS, PE3
Port F: PF[7:1]/IRQ[7:1], PF0/FASTREF
Port GP: PGP7/IC4/OC5, PGP[6:3]/OC[4:1], PGP[2:0]/IC[3:1]
Port G: PG[7:0]/DATA[15:8]
Port H: PH[7:0]/DATA[7:0]
Port MCCI: PMC7/TXDA, PMC6/RXDA, PMC5/TXDB, PMC4/RXDB
Other: BKPT/DSCLK, EXTAL, PAI, PCLK, RESET, T2CLK, TP[15:0], TSC,
EXTAL (when PLL enabled)
Output-Only Pins: ADDR[2:0], CSBOOT, BG/CS1, CLKOUT, FREEZE/QUOT, DSO/IPIPE, PWMA, PWMB
Input/Output Pins:
in wired-OR mode.
DD
includes supply currents for all device modules powered by V
Group 1:
Group 2:
Group 3:
Group 4:
DD
SB
and V
is more than 0.3 V greater than V
STBY
Port GP: PGP7/IC4/OC5, PGP[6:3]/OC[4:1], PGP[2:0]/IC[3:1]
Port G: PG[7:0]/DATA[15:8]
Port H: PH[7:0]/DATA[7:0]
Other: DSI/IPIPE, TP[15:0]
Port A: PA[7:0]/ADDR[18:11]
Port B: PB[7:0]/ADDR[10:3]
Port C: PC[6:3]/ADDR[22:19]/CS[9:6], PC2/FC2/CS5, PC1/FC1, PC0/FC0/CS3
Port D: PD5/PCS2, PD4/PCS1, PD3/PCS0/SS
Port E: PE[7:6]/SIZ[1:0], PE5/AS, PE4/DS, PE3
Port F: PF[7:1]/IRQ[7:1], PF0/FASTREF
Port MCCI: PMC7/TXDA, PMC6/RXDA, PMC5/TXDB, PMC4/RXDB, PMC3/SS
Other: ADDR23/CS10/ECLK, R/W, BERR, BR/CS0, BGACK/CS2
HALT, RESET
Port D: PD2/SCK, PD1/MOSI, PD0/MISO
pin can contribute to this condition.
P
D
Freescale Semiconductor, Inc.
= Maximum V
For More Information On This Product,
ELECTRICAL CHARACTERISTICS
Go to: www.freescale.com
DD
DD
(I
DD
, current flows between the V
+ I
DDSYN
DD
, I
DDSYN
+ I
SB
, I
SB
) + Maximum V
DD
SB
does not exceed V
pins.
, and I
DDA
STBY
.
DDA
and V
(I
DDA
DD
DD
by more than 0.5
)
pins, which
MOTOROLA
A-7