mc68hc916y3 Freescale Semiconductor, Inc, mc68hc916y3 Datasheet - Page 132

• Manufacturer Part Number: mc68hc916y3
• Description: Mc68hc16y3 16 Bit Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

5.5.1.5 Read/Write Signal
5.5.1.6 Size Signals
5.5.1.7 Function Codes
5.5.1.8 Data Size Acknowledge Signals
5-24
MOTOROLA
The read/write signal (R/W) determines the direction of the transfer during a bus cycle.
This signal changes state, when required, at the beginning of a bus cycle, and is valid
while AS is asserted. R/W only transitions when a write cycle is preceded by a read
cycle or vice versa. The signal may remain low for two consecutive write cycles.
Size signals (SIZ[1:0]) indicate the number of bytes remaining to be transferred during
an operand cycle. They are valid while AS is asserted. Table 5-9 shows SIZ0 and SIZ1
encoding.
The CPU generates function code signals (FC[2:0]) to indicate the type of activity oc-
curring on the data or address bus. These signals can be considered address exten-
sions that can be externally decoded to determine which of eight external address
spaces is accessed during a bus cycle.
Because the CPU16 always operates in supervisor mode (FC2 = 1), address spaces
0 to 3 are not used. Address space 7 is designated CPU space. CPU space is used
for control information not normally associated with read or write bus cycles. Function
codes are valid while AS is asserted. Table 5-10 shows address space encoding.
During normal bus transfers, external devices assert the data size acknowledge
signals (DSACK[1:0]) to indicate port width to the MCU. During a read cycle, these
signals tell the MCU to terminate the bus cycle and to latch data. During a write cycle,
the signals indicate that an external device has successfully stored data and that the
cycle can terminate. DSACK[1:0] can also be supplied internally by chip-select logic.
Refer to 5.9 Chip-Selects for more information.
FC2
1
1
1
1
Freescale Semiconductor, Inc.
Table 5-10 Address Space Encoding
For More Information On This Product,
Table 5-9 Size Signal Encoding
SIZ1
0
1
1
0
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FC1
0
0
1
1
SIZ0
1
0
1
0
FC0
0
1
0
1
Transfer Size
Long word
3 Byte
Word
Byte
Address Space
Program space
Data space
CPU space
Reserved
MC68HC16Y3/916Y3
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