mc68hc916y3 Freescale Semiconductor, Inc, mc68hc916y3 Datasheet - Page 182

• Manufacturer Part Number: mc68hc916y3
• Description: Mc68hc16y3 16 Bit Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

5.10.4 Port G
5.10.5 Port H
5-74
MOTOROLA
When the corresponding pin is configured for edge detection, a port F edge-detect flag
register (PORTFE) bit is set if an edge is detected. PORTFE bits remain set, regard-
less of the subsequent state of the corresponding pin, until cleared. To clear a bit, first
read PORTFE, then write the bit to zero. When a pin is configured for general-purpose
I/O or for use as an interrupt request input, PORTFE bits do not change state.
The port F edge-detect interrupt vector register (PFIVR) determines which vector in
the exception vector table is used for interrupts generated by the port F edge-detect
logic. Program PFIVR[7:0] to the value pointing to the appropriate interrupt vector.
Refer to SECTION 4 CENTRAL PROCESSOR UNIT for interrupt vector assignments.
The port F edge-detect interrupt level register (PFLVR) determines the priority level of
the port F edge-detect interrupt. The reset value is $00, indicating that the interrupt is
disabled. When several sources of interrupts from the SCIM2 are arbitrating for the
same level, the port F edge-detect interrupt has the lowest arbitration priority.
Port G is available in single-chip mode only. These pins are always configured for use
as general-purpose I/O in single-chip mode.
The port G data register (PORTG) can be read or written any time the MCU is not in
emulation mode. Reset has no effect.
Port G data direction register (DDRG) bits control the direction of the port pin drivers
when pins are configured as I/O. Setting a bit configures the corresponding pin as an
output. Clearing a bit configures the corresponding pin as an input.
Port H is available in single-chip and 8-bit expanded modes only. The function of these
pins is determined by the operating mode. There is no pin assignment register
associated with this port.
The port H data register (PORTH) can be read or written any time the MCU is not in
emulation mode. Reset has no effect.
Port H data direction register (DDRH) bits control the direction of the port pin drivers
when pins are configured as I/O. Setting a bit configures the corresponding pin as an
output. Clearing a bit configures the corresponding pin as an input.
Freescale Semiconductor, Inc.
PFPAx Bits
For More Information On This Product,
Table 5-30 PFPAR Pin Functions
00
01
10
11
Go to: www.freescale.com
I/O pin without edge detect
Falling edge detect
Rising edge detect
Interrupt request
Port F Signal
MC68HC16Y3/916Y3
USER’S MANUAL