mc68hc916y3 Freescale Semiconductor, Inc, mc68hc916y3 Datasheet - Page 73

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mc68hc916y3

Manufacturer Part Number
mc68hc916y3
Description
Mc68hc16y3 16 Bit Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
4.6.8 Use of CPU16 Indexed Mode to Replace M68HC11 Direct Mode
4.7 Instruction Set
4.7.1 Instruction Set Summary
MC68HC16Y3/916Y3
USER’S MANUAL
In M68HC11 systems, the direct addressing mode can be used to perform rapid
accesses to RAM or I/O mapped from $0000 to $00FF. The CPU16 uses the first 512
bytes of Bank 0 for exception vectors. To provide an enhanced replacement for the
MC68HC11’s direct addressing mode, the ZK field and index register Z have been
assigned reset initialization vectors. By resetting the ZK field to a chosen page and us-
ing indexed mode addressing, a programmer can access useful data structures any-
where in the address map.
The CPU16 instruction set is based on the M68HC11 instruction set, but the opcode
map has been rearranged to maximize performance with a 16-bit data bus. Most
M68HC11 code can run on the CPU16 following reassembly. The user must take into
account changed instruction times, the interrupt mask, and the changed interrupt stack
frame (Refer to Motorola Programming Note M68HC16PN01/D, Transporting
M68HC11 Code to M68HC16 Devices , for more information).
Table 4-2 is a quick reference to the entire CPU16 instruction set. Refer to the CPU16
Reference Manual (CPU16RM/AD) for detailed information about each instruction,
assembler syntax, and condition code evaluation. Table 4-3 provides a key to the table
nomenclature.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA
4-11

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