mc68hc916y3 Freescale Semiconductor, Inc, mc68hc916y3 Datasheet - Page 485

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mc68hc916y3

Manufacturer Part Number
mc68hc916y3
Description
Mc68hc16y3 16 Bit Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Channel selection for A/D conversion D-41
Charge sharing 10-24
CHBK D-91
Chip-select
CIBV D-91
CIER 14-17, D-91
CIRL D-91
CISR 14-14, 14-17, D-94
Clear (definition) 2-9
CLI 4-37
Clipping errors 10-16
CLKOUT 5-29, 5-41
CLKRST (clock reset) 5-41
CLKS D-89
CLO 4-37
Clock
Closed-loop control routines 4-46
CLP 4-37
CLT 4-37
Coherency 13-9, 13-13, 14-5
Combined program and data space map
Combined program and data space maps
COMM 14-13
Command RAM 11-9
Comparator 10-6
Completed queue pointer (CPTQP) D-59
Condition code register (CCR) 4-4, 13-6, 14-6
Configuration options 5-41
MC68HC16Y3/916Y3
USER’S MANUAL
base address registers (CSBAR) 5-63, 5-64
operation 5-67
option registers (CSOR) 5-63, 5-65, D-21
pin assignment registers (CSPAR) 5-63, D-19
reset operation 5-69
signals for interrupt acknowledge 5-67
ADC 10-6
control multipliers
frequency (calculation) D-7
mode
modes
output (CLKOUT) 5-29
phase (CPHA) 12-9, D-55
polarity (CPOL) 12-9, D-55
synthesizer
M68HC916R1 3-24
M68HC16R1 3-22
16-bit expanded mode 5-45
8-bit expanded mode 5-47
address and data bus pin functions 5-42
single-chip mode 5-48
reset values 5-69
reset values 5-69
field encoding 5-64
16.78 MHz 5-10
pin (MODCLK) 5-48
selection 5-48
fast reference option (4.194 MHz) 5-6
slow reference option (32.768 kHz) 5-5
= 0 transfer format 12-9
= 1 transfer format 12-10
operation 5-6
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
CONT D-60
Contention 5-58
Continue (CONT) D-60
Continuous transfer mode 11-7
Conventions 2-9
Conversion
CPHA 11-18, 12-9, 12-10, D-55
CPOL 11-18, 12-9, D-55
CPR D-81, D-93
CPROUT 13-10, D-81
CPTQP 11-10, D-59
CPU space 5-67
CPU16 4-1
complete flags (CCF) D-44
control logic 10-7
counter (CCTR) D-44
timing 10-12
address encoding 5-33
cycles 5-32, 5-67
encoding for interrupt acknowledge 5-68
accumulators 4-3
address
addressing modes 4-8
breakpoints 4-41
compatibility with M68HC11 4-1
condition code register (CCR) 4-4
data types 4-6
extension fields 4-6
features 3-1
general information 4-1
index registers 4-3
instruction 4-11
levels of interrupt priority 5-56
memory
program counter (PC) 4-3
reference manual 4-1
register model 4-2, D-2
registers
modes 10-8
parameters 10-8
extension 4-6
extension register 4-5
accumulator offset 4-10
extended 4-10
immediate 4-9
indexed 4-10
inherent 4-10
post-modified index 4-10
relative 4-10
comparison to M68HC11 4-31
execution model 4-34
set
timing 4-36
management 4-5
organization 4-7
condition code register (CCR) D-3
mnemonics 2-2
multiply and accumulate (MAC) registers 4-5
abbreviations and symbols 4-30
summary 4-12
MOTOROLA
I-3

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