mc68hc916y3 Freescale Semiconductor, Inc, mc68hc916y3 Datasheet - Page 324

• Manufacturer Part Number: mc68hc916y3
• Description: Mc68hc16y3 16 Bit Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

14.6.1.3 Emulation Control
14.6.1.4 Low-Power Stop Control
14.6.2 Channel Control Registers
14-16
MOTOROLA
When T2CG is set, the external T2CLK pin functions as a gate of the DIV8 clock (the
TPU2 system clock divided by eight). In this case, when the external TCR2 pin is low,
the DIV8 clock is blocked, preventing it from incrementing TCR2. When the external
TCR2 pin is high, TCR2 is incremented at the frequency of the DIV8 clock. When
T2CG is cleared, an external clock from the TCR2 pin, which has been synchronized
and fed through a digital filter, increments TCR2. The duration between active edges
on the T2CLK clock pin must be at least nine system clocks.
The TCR2 field in TPUMCR specifies the value of the prescaler: 1, 2, 4, or 8. Channels
using TCR2 have the capability to resolve down to the TPU2 system clock divided by
eight. Table 14-3 is a summary of prescaler output.
Asserting the EMU bit in TPUMCR places the TPU in emulation mode. In emulation
mode, the TPU executes microinstructions from TPUFLASH exclusively. Access to
the TPUFLASH module through the IMB is blocked, and the TPUFLASH module is
dedicated for use by the TPU2. After reset, EMU can be written only once.
When the TPU2 module is used with a flash EEPROM, the EMU bit is cleared out of
reset if the shadow bit for bit 4 of the flash EEPROM module configuration register
(FEEMCR) for the 4-Kbyte flash block is set. If the shadow bit for bit 4 of the FEEMCR
for the 4-Kbyte flash block is clear, the EMU bit is set out of reset.
If the STOP bit in TPUMCR is set, the TPU2 shuts down its internal clocks, shutting
down the internal microengine. TCR1 and TCR2 cease to increment and retain the last
value before the stop condition was entered. The TPU2 asserts the stop flag (STF) in
TPUMCR to indicate that it has stopped.
The channel control and status registers enable the TPU2 to control channel inter-
rupts, assign time functions to be executed on a specified channel, or select the mode
of operation or the type of host service request for the time function specified. Refer to
Table 14-5.
TCR2 Prescaler
00
01
10
11
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 14-3 TCR2 Prescaler Control
Divide By
TIME PROCESSOR UNIT 2
Go to: www.freescale.com
1
2
4
8
Internal Clock
Divided By
16
32
64
8
External Clock
Divided By
MC68HC16Y3/916Y3
USER’S MANUAL
1
2
4
8