mc68hc916y3 Freescale Semiconductor, Inc, mc68hc916y3 Datasheet - Page 177

• Manufacturer Part Number: mc68hc916y3
• Description: Mc68hc16y3 16 Bit Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

5.9.4 Chip-Select Reset Operation
MC68HC16Y3/916Y3
USER’S MANUAL
The least significant bit of each of the 2-bit chip-select pin assignment fields in
CSPAR0 and CSPAR1 each have a reset value of one. The reset values of the most
significant bits of each field are determined by the states of DATA[7:1] during reset.
There are weak internal pull-up drivers for each of the data lines so that chip-select
operation is selected by default out of reset. However, the internal pull-up drivers can
be overcome by bus loading effects.
To ensure a particular configuration out of reset, use an active device to put the data
lines in a known state during reset. The base address fields in chip-select base
address registers CSBAR[0:10] and chip-select option registers CSOR[0:10] have the
reset values shown in Table 5-25. The BYTE fields of CSOR[0:10] have a reset value
of “disable”, so that a chip-select signal cannot be asserted until the base and option
registers are initialized.
Following reset, the MCU fetches the initial stack pointer and program counter values
from the exception vector table, beginning at $000000 in supervisor program space.
The CSBOOT chip-select signal is used to select an external boot device mapped to
a base address of $000000.
The MSB of the CSBTPA field in CSPAR0 has a reset value of one, so that chip-select
function is selected by default out of reset. The BYTE field in chip-select option register
CSORBT has a reset value of “both bytes” so that the select signal is enabled out of
reset. The LSB of the CSBOOT field, determined by the logic level of DATA0 during
reset, selects the boot ROM port size. When DATA0 is held low during reset, port size
is eight bits. When DATA0 is held high during reset, port size is 16 bits. DATA0 has a
weak internal pull-up driver, so that a 16-bit port is selected by default out of reset.
However, the internal pull-up driver can be overcome by bus loading effects. To en-
sure a particular configuration out of reset, use an active device to put DATA0 in a
known state during reset.
Table 5-25 Chip-Select Base and Option Register Reset Values
Freescale Semiconductor, Inc.
For More Information On This Product,
Async/sync Mode
Upper/lower byte
Address space
Base address
Read/write
Autovector
Block size
DSACK
AS/DS
Fields
IPL
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External interrupt vector
Asynchronous mode
Reset Values
No wait states
CPU space
Any level
$000000
Disabled
Disabled
2 Kbyte
AS
MOTOROLA
5-69