mt90502ag2 Zarlink Semiconductor, mt90502ag2 Datasheet - Page 105

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mt90502ag2

Manufacturer Part Number
mt90502ag2
Description
Multi-channel Aal2 Sar
Manufacturer
Zarlink Semiconductor
Datasheet
2.11.2
There are two types of memory structures in the MT90502: fixed structures and variable structures. Fixed
structures are of a defined size and base address, and are mapped according to the sar_capacity register field
(register 240h), which determines the total channel capacity of the MT90502. The one exception is the RX Circular
Buffers, whose size is determined by the rx_circular_buffer_size field (register 240h). The size of variable
structures can be configured individually in registers.
When two memory banks exist, TX memory employs memory controller A and memory interface pins A, while RX
memory uses memory controller B and memory interface pins B. When one memory bank exists, only memory
controller A and memory interface pins A are used.
TX SSRAM fixed structures are (with sizes in bytes for 128, 256, 512, and 1023 channels)
TX SSRAM variable structures are
AAL2 VC structures (4 K, 8 K, 16 K, 32 K)
CPS-Packet Final Assembly structures (4 K, 8 K, 16 K, 32 K)
Cell Assembly Event Queue (512, 1 K, 2 K, 4 K)
CPS-Packet Circular Buffers (32 K, 64 K, 128 K, 256 K)
Clock Recovery Point Buffers (2 buffers the same size, either 4 K, 8 K, 16 K, 32 K, 64 K, or 128 KB each)
SSRAM Silence Buffers (up to 64, each pair can have a length of 0 to 64 KB per buffer)
Silent Suppression Look-up Tables
Memory Structures
Start Address
2000000h
3000000h
400000h
600000h
10000h
2C00h
C000h
2600h
2800h
3000h
4000h
6000h
8000h
Table 34 - MT90502 Memory Map (continued)
End Address
2FFFFFEh
3FFFFFEh
4FFFFEh
7FFFFEh
103FEh
BFFEh
2BFEh
2FFEh
3FFEh
5FFEh
7FFEh
FFFEh
26FEh
Zarlink Semiconductor Inc.
MT90502
105
RX Channel Association Memory
TX Channel Association Memory
UTOPIA Port C Output FIFO
Tone Buffer Control Memory
UTOPIA Port A Output FIFO
UTOPIA Port B Output FIFO
RX TDM Control Memory
TX TDM Control Memory
RX SAR Output FIFO
SSRAM bank A
SSRAM bank B
SDRAM bank A
SDRAM bank B
Name
Data Sheet

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