mt90502ag2 Zarlink Semiconductor, mt90502ag2 Datasheet - Page 180
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mt90502ag2
Manufacturer Part Number
mt90502ag2
Description
Multi-channel Aal2 Sar
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT90502AG2.pdf
(204 pages)
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Address: 82Ah
Label: pointb_read
Reset Value: 0000h
pointb_rpnt
reserved
Address: 82Ch
Label: pointb_write
Reset Value: 0000h
pointb_wpnt
reserved
Address: 830h
Label: cid_base
Reset Value: 0000h
cid_descriptor_base_address
reserved
Label
Label
Label
Bit Position Type
Bit Position Type
15:14
15:14
13:0
13:0
Bit Position Type
Table 196 - Point B Write Pointer Register
Table 195 - Point B Read Pointer Register
Table 197 - CID Base Address Register
15:5
4:0
RW The CUP’s read pointer to the clock recovery point FIFO. This read
RW Reserved. Must always be “00”
RO
RO
pointer has an extra bit to allow for a full buffer (for example, 2048
points instead of 2047)
pointer has an extra bit to allow for a full buffer (for example, 2048
points instead of 2047)
Reserved. Always read as “00”
RW Bits 23:21 of the CID descriptor’s base address in the SDRAM
RW Reserved. Must always be “0000_0000_000”
The chip's write pointer to the clock recovery point FIFO. This read
Zarlink Semiconductor Inc.
MT90502
180
Description
Description
Description
Data Sheet
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