mt90502ag2 Zarlink Semiconductor, mt90502ag2 Datasheet - Page 130

• Manufacturer Part Number: mt90502ag2
• Description: Multi-channel Aal2 Sar
• Manufacturer: Zarlink Semiconductor

Address: 234h
Label: mem_parity2
Reset Value: 0000h
mem_parity_generation_add_mask[15:0]
Address: 240h
Label: mem_conf0
Reset Value: 0075h
mema_add_lines
memb_add_lines
sar_capacity
rx_circular_buffer_size
memb_bank_present
reserved
Address: 242h
Label: mem_conf1
Reset Value: 0000h
rx_base_address
reserved
Label
Label
Label
Bit Position
Bit Position Type
15:8
Table 62 - Memory Configuration Register 1
7:0
Table 61 - Memory Configuration Register 0
15:9
1:0
3:2
5:4
7:6
8
Table 60 - Memory Parity Register 2
Type
RW
RW
RW
RW
RW
RW
RW
RW
Zarlink Semiconductor Inc.
Position
15:0
Base address of the RX SSRAM in Bank A. Specified in
increments of 8 K bytes. Not used if bank B is present.
Reserved. Must always be “0000_0000”
Bit
MT90502
“11” = 1 Mb per chip; “10” = 512 Kb per chip; “01” = 256 Kb per
chip; “00” = 128 Kb per chip
“11” = 1 Mb per chip; “10” = 512 Kb per chip; “01” = 256 Kb per
chip; “00” = 128 Kb per chip
“00”=128 channels; “01”=256 channels; “10”=512 channels;
“11”=1023 channel.
Indicates the size of the RX Circular Buffers in external
memory. They can be set locally to 256, 512, 1024 bytes. “00”=
reserved;”01”=256 bytes; “10”=512 bytes; “11”=1024 bytes.
Indicates if memory bank B is present or not. '0' = memb bank
absent; '1' = memb bank present.
Reserved. Must always be “0000_000”
130
Type
RW The address bits whose corresponding bit is set to
'1' in this vector will be used in parity calculation to
the external memory.
Description
Description
Description
Data Sheet