mt90502ag2 Zarlink Semiconductor, mt90502ag2 Datasheet - Page 59
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mt90502ag2
Manufacturer Part Number
mt90502ag2
Description
Multi-channel Aal2 Sar
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT90502AG2.pdf
(204 pages)
- Current page: 59 of 204
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Note: A and B bits in both the PCM and HDLC CPS-Packet disassembly structures are used to signal the chip
when a timing reference CPS-Packet has been received. As the UTOPIA module can also generate these signals
based on timing reference cells, each of these bits should be set in only one location: either in a single LUT or in a
single CPS-Packet disassembly structure.
The compression rate of the ADPCM CPS-Packets can be dynamically determined using the EDU field and the LI
field of the CPS-Packet. Once the compression rate is determined for a CID, the ADPCM samples will be formatted
according to the compression rate (see Figure 26 on page 60) and placed in the Rx Circular Buffer.
To alter the monitored delay, software can generate a delay adjustment by writing the ADJ field to ‘1’ and the 2’s
Complement Delay Adjust field to the number of bytes by which the delay should be altered.
Counter[15:0]
CPS-Packet
Expected LI
Bits/UUI M
# Seq
Field
RU
RL
Table 23 - CPS-Packet Disassembly Structure (HDLC format) Fields (continued)
Name of Field
Report UUI
Errors
Number
Sequence Bits
in the UUI and
UUI Match
Report Length
CPS-Packet
Expected LI
counter
Errors
Offset/Bits
+10/b13:b8
+C/b15:b0
+10/b4:b0
Address
+10/b7
+10/b6
Used
Byte
Zarlink Semiconductor Inc.
MT90502
Free running count of received CPS-Packets (SID included).
The LI expected in all voice packets. If the received LI does
not match the Expected LI and RL = ‘1’, then an error report
structure will be generated. Note: the CPS-Packet will still be
treated.
Report each CPS-Packet received in which the LI does not
match Expected LI.
Report each CPS-Packet received in which the UUI does
not match expected UUI.
‘10000’ = 4 sequence bits
‘x1000’ = 3 sequence bits & UUI[3] in match
‘xx100’ = 2 sequence bits & UUI[3:2] in match
‘xxx10’ = 1 sequence bit & UUI[3:1] in match
‘xxxx1’ = 0 sequence bits & UUI[3:0] in match
59
Description of Field
Data Sheet
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