mt90502ag2 Zarlink Semiconductor, mt90502ag2 Datasheet - Page 73

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mt90502ag2

Manufacturer Part Number
mt90502ag2
Description
Multi-channel Aal2 Sar
Manufacturer
Zarlink Semiconductor
Datasheet
Unknown cells cannot be sent to the SAR portion of the RX_SAR. The routing of unknown cells is set in registers
6A4h and 6A6h.
Known cells are handled according to the LUT (Look-Up Table) entry for the cell's VPI/VCI.
A cell is deemed to be an OAM cell if its MSB of PTI field is set.
2.6.5.2
LUT entries direct cells with known VPI/VCIs to either be discarded or placed in one or more of five possible
destinations: the four output FIFOs (UTOPIA A, UTOPIA B, UTOPIA C or RX SAR (internal)) and the data cell FIFO
in external SSRAM. OAM cells can be directed independently of non-OAM cells with the same VPI/VCI. OAM cells
cannot be directed to the SAR portion of the RX_SAR.
All look-up table entries in the three LUTs are the same size. Cells undergoing header translation have their NNI
bits, the remaining VPI bits and/or the VCI bits replaced by the corresponding bits in the LUT entry and are then
either discarded or sent to one or more of the possible destinations. Note: the 4 MSBs of the header (VPI bits 11:8
in NNI mode, or the GFC field in UNI mode) can be translated separately from the remaining portion of the VPI. The
remaining two portions can also be translated separately, 8 bits of VPI and the 16 bits of VCI. The 3 header
translation enable bits, NNI, VPI, and VCI denote the translation portion of the header. VCs that undergo header
translation cannot be directed to the SAR portion of the RX_SAR as no RX_SAR structure pointer is available in the
LUT entry.
The look-up engine also contains bits indicating if the received cell is a timing reference cell. A timing reference cell
indicates a cell whose arrival frequency, over a long period of time, is constant, and therefore can be used as a
reference for the local TDM clock. If a timing reference cell is received, the UTOPIA module will send a pulse to the
clock recovery module, indicating that such a cell has been received. Clock recovery information can be gathered
from up to two VCs by setting bit A in one LUT entry and bit B in the same or another LUT entry. A maximum of one
VC can have bit A set and a maximum of one VC can have bit B set.
GFC | VPI | VCI (from cell header) 0010 10000000 00000000 10110010
Match Value
Match Result (1 = Mismatch)
Mask Value
Mask Result (1 = mismatched cell)
Result
Look-Up Tables Entries
For each bit, result = (match XOR header) AND mask
0000 00000000 00000000 10110010
0010 10000000 00000000 00000000
0000 00111111 00000000 11111111
0000 00000000 00000000 00000000
Routed according to LUT entry
Figure 36 - Mask & Match Example
Zarlink Semiconductor Inc.
MT90502
73
0010 10000000 00000000 10110 1 10
0000 00000000 00000000 10110 0 10
0010 10000000 00000000 00000 1 00
0000 00111111 00000000
0000 00000000 00000000 00000 1 00
Routed as unknown cell
11111 1 11
1
0
1
1
1
Data Sheet

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