mt90502ag2 Zarlink Semiconductor, mt90502ag2 Datasheet - Page 168

• Manufacturer Part Number: mt90502ag2
• Description: Multi-channel Aal2 Sar
• Manufacturer: Zarlink Semiconductor

Address: 720h
Label: mastership0
Reset Value: 0200h
ct_c8_frame_a_oe
ct_c8_frame_b_oe
ct_compatibility_oe
reserved
fr_comp_polarity
fr_comp_type
fr_comp_frequency
sclk_invert
sclkx2_invert
sclk_frequency
reserved
Address: 722h
Label: mastership1
Reset Value: 0002h
mastership_mode
slaveship_mode
reserved
Label
Label
Position Type
Bit Position Type
15:4
Bit
1:0
3:2
13:12
15:14
4:3
7:6
9:8
10
11
0
1
2
5
Table 173 - H.100/H.110 Master Register 0
Table 174 - H.100/H.110 Master Register 1
RW Selects the mode of the Master Circuitry. “00” = backup on A; “01” =
RW Selects the mode of the Slave Circuitry. “00” = Track ct_c8_a &
RW Reserved. Must always be “0000_0000_0000”
RW Controls the output enable of the ct_c8_a and ct_frame_a. '0' =
RW Controls the output enable of the ct_c8_b and ct_frame_b. '0' =
RW Controls the output enable of the H100 compatibility signals. '0' =
RW fr_comp pin polarity. '0' = Active low; '1' = active high.
RW fr_comp pin timing type. “00”=straddle clock boundary; “01”= active
RW fr_comp frequency (pulse width). “00” = fr_comp related clock
RW When '1', it inverts the sclk polarity as defined in the H100
RW When '1', it inverts the sclkx2 polarity as defined in the H100
RW Selects the sclk frequency for the generation of sclk and sclk2. “00”
RW Reserved. Must always be “00”
RO Reserved. Always read as “00”
backup on B; “10” = master on A; “11” = master on B. When
ct_c8_frame_a_oe, ct_c8_frame_b_oe, ct_compatibility_oe are '0', this
value does not matter.
ct_frame_a; “01” = Track ct_c8_b & ct_frame_b; “10” = Track ct_c8_a &
ct_frame_a, but if they fail track ct_c8_b & ct_frame_b; “11” = Track
ct_c8_b & ct_frame_b, but if they fail track ct_c8_a & ct_frame_a.
tri-state; '1' = drive pins.
tri-state; '1' = drive pins.
tri-state; '1' = drive pins.
during last bit; “10” = active during first bit; “11” = reserved.
frequency at 2 MHz; “01” = fr_comp related clock frequency at 4
MHz; “10” = fr_comp related clock frequency at 8 MHz;
“11”=reserved.
Specifications.
Specifications.
= 2 MHz; “01” = 4 MHz; “10” = 8 MHz; “11” = reserved.
Zarlink Semiconductor Inc.
MT90502
168
Description
Description
Data Sheet