mt90502ag2 Zarlink Semiconductor, mt90502ag2 Datasheet - Page 88
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mt90502ag2
Manufacturer Part Number
mt90502ag2
Description
Multi-channel Aal2 Sar
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT90502AG2.pdf
(204 pages)
- Current page: 88 of 204
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Address
21Ah
71Ah
71Ch
210h
218h
710h
712h
714h
718h
740h
742h
744h
[12:11]
[12:11]
[15:0]
[15:0]
[15:0]
[15:0]
[12:8]
[12:8]
Bits
[9:0]
[9:0]
[4:0]
[4:0]
[4:0]
[10]
[10]
[10]
[10]
[13]
[10]
[13]
[13]
[14]
[13]
[14]
[5]
[6]
[5]
[6]
interrupt_enable1
interrupt_enable2
interrupt_flags
gpio_out_reg0
gpio_out_reg1
gpio_out_reg2
Register
adapa0
adapa1
adapa2
adapb0
adapb1
adapb2
Table 30 - Clock Recovery Registers
clkrecov_alarm_interrupt_a
clkrecov_alarm_interrupt1_
clkrecov_alarm_interrupt2_
keep_one_pulse_out_of_x
keep_one_pulse_out_of_x
gpio_0_output_constant
gpio_1_output_constant
gpio_2_output_constant
gpio_3_output_constant
gpio_0_output_enable
gpio_1_output_enable
gpio_2_output_enable
gpio_3_output_enable
clk_divisor_load_now
clk_divisor_load_now
gpio_0_output_select
gpio_1_output_select
gpio_2_output_select
gpio_3_output_select
gpio_4_output_select
Zarlink Semiconductor Inc.
clk_divisor_reset
clk_divisor_reset
div_fraction
div_fraction
div_integer
div_integer
MT90502
enable
enable
source
source
ctive
Bits
88
Indicates clock recovery buffer is half full.
Activates interrupt1 when clkrecov_alarm set.
Activates interrupt2 when clkrecov_alarm set.
Number of points generated to send to external
memory.
If ‘0’, reset clock divisor.
‘00’ - reference VC, ‘01’ - gpio[0] all edges, ‘10’ gpio[0]
rising edges, ‘11’ gpio[0] falling edges
If set to ‘1’, loads adaptive module A’s divisor.
Adaptive module A - integer divisor
Adaptive module A - fractional component of divisor
Number of points generated to send to external
memory.
If ‘0’, reset clock divisor.
‘00’ - reference VC, ‘01’ - gpio[0] all edges, ‘10’ gpio[0]
rising edges, ‘11’ gpio[0] falling edges
If set to ‘1’, loads adaptive module A’s divisor.
Adaptive module A - integer divisor
Adaptive module A - fractional component of divisor
See Table 32, “GPIO mux, Output Selection,” on
page 90.
Constant value of ‘00110’ (see Table 32)
‘0’ - tri-state, ‘1’ - output enabled.
see Table 32
Constant value of ‘00110’ (see Table 32)
‘0’ - tri-state, ‘1’ - output enabled.
See Table 32, “GPIO mux, Output Selection,” on
page 90.
Constant value of ‘00110’ (of Table 32)
‘0’ - tri-state, ‘1’ - output enabled.
See Table 32, “GPIO mux, Output Selection,” on
page 90.
Constant value of ‘00110’ (of Table 32)
‘0’ - tri-state, ‘1’ - output enabled.
See Table 32, “GPIO mux, Output Selection,” on
page 90.
Description
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