mt90502ag2 Zarlink Semiconductor, mt90502ag2 Datasheet - Page 162

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mt90502ag2

Manufacturer Part Number
mt90502ag2
Description
Multi-channel Aal2 Sar
Manufacturer
Zarlink Semiconductor
Datasheet
3.7
Address: 6A6h
Label: unknown_oam_routing
Reset Value: 0000h
rxa_ocr
rxb_ocr
rxc_ocr
reserved
Address: 700h
Label: control
Reset Value: 0000h
pll_clk_in_frequency
global_oe
number_of_active_streams
h100_ct_c8_frame_loopback
tdm_stream_format
reserved
test_status
H.100/H.110 Registers
Label
Label
Bit Position Type
15:12
11:8
3:0
7:4
Bit Position Type
Table 159 - Unknown OAM Routing Register
Table 160 - H.100/H.110 Control Register
13:6
1:0
4:3
14
15
2
5
RW Routing of OAM cells from port A that fail the VPI-VCI match and
RW Routing of OAM cells from port B that fail the VPI-VCI match and
RW Routing of OAM cells from port C that fail the VPI-VCI match and
RW Reserved. Must always be “0000”
mask test. “xxx1” = send to port A, “xx1x” = send to port B, “x1xx” =
send to port C, “1xxx” = send to AAL0.
mask test. “xxx1” = send to port A, “xx1x” = send to port B, “x1xx” =
send to port C, “1xxx” = send to AAL0.
mask test. “xxx1” = send to port A, “xx1x” = send to port B, “x1xx” =
send to port C, “1xxx” = send to AAL0.
RW '0' = internal loopback (all OEs disabled); '1'=global OE
RW “00”= 32 active streams; “01” = 16 active streams; “10” = 8
RW When '1', the ct_c8_X and ct_frame_X are looped back
RW Reserved. Must always be '0'.
RW “00”= 8.192 MHz; “01”= 16.384 MHz; “10”= 32.768 MHz;”11”=
RW Each bit represents a quad of TDM streams. Bit 6 is quad 0. '0'
Zarlink Semiconductor Inc.
TS Reserved. Must always be “0”.
MT90502
65.536 MHz.
enabled.
active streams; “11” = 4 active streams.
internally, without the need of going out on the actual pins. '0'
for normal operation.
= Format A; '1' = Format B.
162
Description
Description
Data Sheet

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