mt90502ag2 Zarlink Semiconductor, mt90502ag2 Datasheet - Page 87

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mt90502ag2

Manufacturer Part Number
mt90502ag2
Description
Multi-channel Aal2 Sar
Manufacturer
Zarlink Semiconductor
Datasheet
There are eight GPIO multiplexers in the clock recovery section of the MT90502. In addition, there are two
multiplexers for the two ct_netref signals of the H.110 bus. See registers 740h - 748h (Table 30, “Clock Recovery
Registers,” on page 88). There are 23 possible inputs for each multiplexer (see Table 32, “GPIO mux, Output
Selection,” on page 90).
clkrecov_pulse_b
ct_frame_selected
clkrecov_pulse_a
ct_c8_selected
ct_c8_a
ct_c8_b
ct_frame_a
ct_frame_b
‘0’/‘1’
ct_netref1
ct_netref2
gpio_in[0]
gpio_in[1]
gpio_in[2
gpio_in[3]
gpio_in[4]
gpio_in[5]
gpio_in[6]
gpio_in[7]
adapa_ref
adapb_ref
mc_clock
ct_mc
gpio_x_output_select
ct_netrefx_output_select
and Level
Monitor
Edges
Figure 49 - GPIO Functionality
Zarlink Semiconductor Inc.
MT90502
87
gpio_x_output_enable, ct_netrefx_output_enable
gpio[7:0], ct_netref1, ct_netref2
Data Sheet

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