mt90502ag2 Zarlink Semiconductor, mt90502ag2 Datasheet - Page 196
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mt90502ag2
Manufacturer Part Number
mt90502ag2
Description
Multi-channel Aal2 Sar
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT90502AG2.pdf
(204 pages)
- Current page: 196 of 204
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4.3.2
Symbol
t1
t2
t3
t4
t5
t6
External Memory Interface
Input setup time
Input hold time
Clock to data valid
Clock to data change
Clock rising to signal driven
Clock rising to signal tri-state
mem_*(output)
mem_*(input)
mem_clk
Characteristics
Figure 80 - External Memory Timing (both SSRAM and SDRAM)
Table 211 - External Memory Timing
t5
t3
Zarlink Semiconductor Inc.
MT90502
Min.
2
0
2
2
t1
196
t4
t2
Typ.
Max.
8.30
10
t6
Units
ns
ns
ns
ns
ns
ns
Data Sheet
50 pF
50 pF
Load
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