IPT-DSPBUILDER Altera, IPT-DSPBUILDER Datasheet - Page 143

• Manufacturer Part Number: IPT-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPT-DSPBUILDER

• Function: DSP Builder
• License: Initial License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

Figure 9–1. top.mdl Example
Creating a Custom Library Block
© June 2010 Altera Corporation
A parameterizable custom library block is a Simulink subsystem in which
DSP Builder primitives describe the block functionality. This design flow also
supports parameterizable hierarchical subsystem structures.
Altera provides an example of a custom library block, <DSP Builder install path>\
DesignExamples\Tutorials\BuildingCustomLibrary\top.mdl.
The RamBasedDelay block that top.mdl uses, is an example of a custom
parameterizable Simulink block. The library file MyLib.mdl defines it. The
RamBasedDelay block has one parameter, Delay.
To create your own custom block, follow these steps:
1.
2.
3.
4.
5.
6.
Creating a Library Model File
Building the HDL Subsystem Functionality
Defining Parameters Using the Mask Editor
Linking the Mask Parameters to the Block Parameters
Making the Library Block Read Only
Adding the Library to the Simulink Library Browser
Preliminary
9. Using Custom Library Blocks
DSP Builder Standard Blockset User Guide
(Figure
9–1).