IPT-DSPBUILDER Altera, IPT-DSPBUILDER Datasheet - Page 219

• Manufacturer Part Number: IPT-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPT-DSPBUILDER

• Function: DSP Builder
• License: Initial License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

Chapter 2: Arithmetic Library
DSP
© June 2010 Altera Corporation
f
The following equation expresses the block function:
If there are four multipliers and the input bit widths are both less than or equal to 18,
you can optionally enable a chainout adder output (chainout) instead of the normal
output (res).
If there are four multipliers and the input bit widths are both equal to 18, you can
enable a chainout adder input (chainin). Only drive this chainin port from the
chainout output of a DSP block at the preceding stage.
Other features include:
■
■
■
■
■
■
■
■
For more information about multiplier or adder operations, refer to the
Megafunction User
Table 2–19
Table 2–19. DSP Block Inputs and Outputs
a0—a3
b0—b3
ena
chainin
zero_chainout Input
aclr
accum_sload
res
shiftouta
overflow
chainout
Note to
(1) Use the chainin port to feed the adder result (chainout) from a previous stage. Do not use for any other
res = a
Parameterizable input and output data widths
Optional asynchronous clear and clock enable inputs
Optional accumulator synchronous load input
Optional shiftin instead of an a input
Optional shift out from the a input of the last multiplier
Optional saturation overflow outputs
Optional registers to pipeline the adder and chainout adder
Optional accumulator mode
signal.
Signal
Table
0
×b
shows the DSP block inputs and outputs.
2–19:
0
± a
1
×b
Guide.
Input
Input
Input
Input
Input
Input
Output
Output
Output
Output
1
Direction
[+ a
2
×b
2
Preliminary
[± a
Operand a.
Operand b.
Optional clock enable.
Optional input bus from the preceding stage.
Optional reset to zero for the chainout value.
Optional asynchronous clear.
Optional accumulator synchronous load input.
Result.
Optional shift out from A input of last multiplier.
Optional saturation overflow output.
Optional chainout output. (Replaces the res output when
enabled.)
3
×b
3
]] [+ chainin]
Description
DSP Builder Standard Blockset Libraries
(1)
altmult_add
2–11