IPT-DSPBUILDER Altera, IPT-DSPBUILDER Datasheet - Page 381

• Manufacturer Part Number: IPT-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPT-DSPBUILDER

• Function: DSP Builder
• License: Initial License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

Chapter 11: Boards Library
Cyclone III EP3C120 DSP Board
Table 11–5. Cyclone III EP3C120 DSP Board Blocks
© June 2010 Altera Corporation
f
Block
Display0
A2D_1_HSMC_A,
A2D_1_HSMC_B,
A2D_2_HSMC_A,
A2D_2_HSMC_B
D2A_1_HSMC_A,
D2A_1_HSMC_B,
D2A_2_HSMC_A,
D2A_2_HSMC_B
Dip Switch
LED0–LED7
PB0–PB3,
CPU_RESETN
For information about setting up the board, and supported hardware features, refer to
the
There are four design examples for the Cyclone III EP3C120 DSP board:
■
■
■
■
Figure 11–6
Test3C120Board_Leds.mdl: This design tests the LEDs and push-button switches
on the main development board.
Test3C120Board_QuadDisplay.mdl: This design tests the 7-segment display on
the main development board.
Test3C120Board_HSMA.mdl: This design tests the analog-to-digital and
digital-to-analog converters on the daughtercard connected to HSMC port A.
Test3C120Board_HSMB.mdl: This design tests the analog-to-digital and
digital-to-analog converters on the daughtercard connected to HSMC port B.
Cyclone III Development Board, Reference
shows the test design for the LEDs and push buttons.
User defined 4-digit seven-segment LED display (U30).
Controls 14-bit signed analog-to-digital converters on the optional high speed
mezzanine cards (HSMC). You can optionally specify the clock signal.
Controls the 14-bit unsigned digital-to-analog converters on the optional high speed
mezzanine cards (HSMC).
Controls the user-definable dual in-line package switch (SW6). You can optionally
specify the clock signal.
Controls eight user-definable LEDs (D26–D33).
Controls four user-definable push-button switches (S1–S4) and the CPU reset
push-button (S5). You can optionally specify the clock signal.
Preliminary
Manual.
Description
DSP Builder Standard Blockset Libraries
11–7