IPT-DSPBUILDER Altera, IPT-DSPBUILDER Datasheet - Page 163

DSP BUILDER SOFTWARE

IPT-DSPBUILDER

Manufacturer Part Number
IPT-DSPBUILDER
Description
DSP BUILDER SOFTWARE
Manufacturer
Altera
Type
DSPr
Datasheet

Specifications of IPT-DSPBUILDER

Function
DSP Builder
License
Initial License
Software Application
IP CORE, DSP BUILDER
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Supported Families
Arria GX, Arria II GX, Cyclone, Stratix
Rohs Compliant
NA
Lead Free Status / RoHS Status
Not applicable / Not applicable
Chapter 11: Using the State Machine Library
Using the State Machine Editor Block
© June 2010 Altera Corporation
Figure 11–8. State Machine Editor Wizard Transitions Page
8. Click Next to display the Actions page. Delete the default output port name
1
Figure 11–8
transitions.
(output1) and enter the following new output port names:
out_empty
out_full
out_idle
out_pop_not_empty
out_push_not_full
The transitions are validated on entry and must conform with Verilog HDL
syntax.
shows the Transitions page after you define the states, inputs, and
Preliminary
DSP Builder Standard Blockset User Guide
11–9

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