IPT-DSPBUILDER Altera, IPT-DSPBUILDER Datasheet - Page 301

• Manufacturer Part Number: IPT-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPT-DSPBUILDER

• Function: DSP Builder
• License: Initial License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

Chapter 5: Interfaces Library
Avalon-ST Packet Format Converter
PFC Data Flow
Packet Format Description
© June 2010 Altera Corporation
The PFC spools data into a FIFO-like memory as it arrives, and spools it out in a
different order as it leaves. DSP Builder can provide the data at the output of each
interface as soon as it writes it into the memory and all previous output data is
transferred. When the PFC has multiple output interfaces, the startofpacket
signal for all the interfaces is asserted at the same time.
The PFC stops data input on input interfaces by deasserting the ready signal
whenever there is a risk of overwriting data that it has not yet output. If a
downstream block pauses output data by deasserting the ready signal to the PFC,
the PFC accepts data until it risk overwriting unsent data. At this point, the PFC
deasserts the ready signals on its own input interface, causing the upstream block to
stop sending data.
In a similar way, if the upstream block starves the PFC of data by deasserting the
valid signals to the PFC, then the PFC output interface continues to send data until
the memory drains. It then stops sending data by deasserting the output valid
signals.
For multiple interface PFC blocks, back pressuring an output interface or starving an
input interface affects all other interfaces. When an output interface is back pressured,
the input interfaces are back pressured, causing the other outputs to be starved of
data. Likewise, if an input interface is starved of data, the output interfaces eventually
stop, causing the other input interfaces to be back pressured.
For each input and output interface, the number of symbols per beat and the packet
description describe the basic format of the packet.
The number of symbols per beat defines, for each interface, the number of symbols
that present in parallel on every active cycle. The packet description is a string that
describes the fields in the packet.
A basic packet description is a comma-separated list of field names, where a field
name includes any of the characters a-z, A-Z, _, or 0-9 but must start with a letter.
For example: Field1, Red, Green, Blue, and DestinationAddress. Field names
are case sensitive. Do not use whitespace in a packet description.
If fields repeat in a packet, parentheses delineate the repeated group (of one or more
fields), and a positive integer follows the group to indicate the number of repeats. The
following examples describe the parenthesis further:
■
■
■
Use a + instead of a positive integer, such as (Red,Green,Blue)+, to repeat a group
an unspecified number of times in a packet. However, such a group must compose the
entire packet. Therefore, none of the following examples are valid: A,(B,C)+,
(A,B)+,C, or((A)+)2.
Dest,Source,(Data)128,(CRC)4 indicates a packet that has destination and
source address symbols followed by 128 data symbols and 4 CRC symbols.
(Red,Green,Blue)100 refers to a frame with 100 repetitions of a symbol of
Red, followed by a symbol of Green, followed by a symbol of Blue.
Nest repeats, so that (F1,(F2)3,F3)2,F4 is equivalent to (F1,F2,F2,F2,F3)2,F4 or
F1,F2,F2,F2,F3,F1,F2,F2,F2,F3,F4.
Preliminary
DSP Builder Standard Blockset Libraries
5–15