ATUC128L4U Atmel Corporation, ATUC128L4U Datasheet - Page 18

• Manufacturer Part Number: ATUC128L4U
• Manufacturer: Atmel Corporation

Specifications of ATUC128L4U

• Flash (kbytes): 128 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 50 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 36
• Ext Interrupts: 36
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 460
• Analog Comparators: 8
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.62 to 3.6
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 35
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Table 3-8.
Note:
3.4
3.4.1
3.4.2
3.4.3
3.4.4
32142A–12/2011
Signal Name
EVTI_N
EVTO_N
PA22 - PA00
PB27 - PB00
1. See
I/O Line Considerations
JTAG Pins
PA00
RESET_N Pin
TWI Pins PA21/PB04/PB05
Signal Description List, Continued
Section 6. on page 39
Function
Event In
Event Out
Parallel I/O Controller I/O Port 0
Parallel I/O Controller I/O Port 1
The JTAG is enabled if TCK is low while the RESET_N pin is released. The TCK, TMS, and TDI
pins have pull-up resistors when JTAG is enabled. The TCK pin always has pull-up enabled dur-
ing reset. The TDO pin is an output, driven at VDDIO, and has no pull-up resistor. The JTAG
pins can be used as GPIO pins and multiplexed with peripherals when the JTAG is disabled.
Please refer to
Note that PA00 is multiplexed with TCK. PA00 GPIO function must only be used as output in the
application.
The RESET_N pin is a schmitt input and integrates a permanent pull-up resistor to VDDIN. As
the product integrates a power-on reset detector, the RESET_N pin can be left unconnected in
case no reset from the system needs to be applied to the product.
The RESET_N pin is also used for the aWire debug protocol. When the pin is used for debug-
ging, it must not be driven by external circuitry.
When these pins are used for TWI, the pins are open-drain outputs with slew-rate limitation and
inputs with spike filtering. When used as GPIO pins or used for other peripherals, the pins have
the same characteristics as other GPIO pins. Selected pins are also SMBus compliant (refer to
Section on page
path to ground when the ATUC64/128/256L3/4U is powered down. This allows other devices on
the SMBus to continue communicating even though the ATUC64/128/256L3/4U is not powered.
After reset a TWI function is selected on these pins instead of the GPIO. Please refer to the
GPIO Module Configuration chapter for details.
Section 3.2.4 on page 13
10). As required by the SMBus specification, these pins provide no leakage
General Purpose I/O pin
for the JTAG port connections.
Output
Type
Input
I/O
I/O
ATUC64/128/256L3/4U
Active
Level
Low
Low
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