ATUC128L4U Atmel Corporation, ATUC128L4U Datasheet - Page 455

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ATUC128L4U

Manufacturer Part Number
ATUC128L4U
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATUC128L4U

Flash (kbytes)
128 Kbytes
Pin Count
48
Max. Operating Frequency
50 MHz
Cpu
32-bit AVR
# Of Touch Channels
17
Hardware Qtouch Acquisition
Yes
Max I/o Pins
36
Ext Interrupts
36
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
460
Analog Comparators
8
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.62 to 3.6
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
35
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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Quantity
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Atmel
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20.6.6
20.6.6.1
20.6.6.2
20.6.6.3
20.6.6.4
20.6.6.5
20.6.7
20.6.7.1
32142A–12/2011
LIN Errors
LIN Frame Handling
Identifier Parity Error (CSR.LINIPE)
Inconsistent Sync Field Error (CSR.LINISFE)
Master Node Configuration
Slave Not Responding Error (CSR.LINSNRE)
Checksum Error (CSR.LINCE)
Bit Error (CSR.LINBE)
Note:
If the Checksum is sent (CHKDIS=0):
If the Checksum is not sent (CHKDIS=1):
These error bits are cleared by writing a one to CSR.RSTSTA.
This error is generated if no valid message appears within the TFrame_Maximum time frame
slot, while the USART is expecting a response from another node (NACT=SUBSCRIBE).
This error is generated if the received checksum is wrong. This error can only be generated if the
checksum feature is enabled (CHKDIS=0).
This error is generated if the identifier parity is wrong. This error can only be generated if parity is
enabled (PARDIS=0).
This error is generated in slave mode if the Sync Field character received is not 0x55. Synchro-
nization procedure is aborted.
This error is generated if the value transmitted by the USART on Tx differs from the value sam-
pled on Rx. If a bit error is detected, the transmission is aborted at the next byte border.
The following procedure depends on the NACT setting:
• TFrame_Maximum = 1.4 x (THeader_Nominal + TResponse_Nominal + 1)
• TResponse_Nominal = 10 x (NData + 1)
• TFrame_Maximum = 1.4 x (34 + 10 x (DLC + 1 + 1) + 1)
• TFrame_Maximum = 77 + 14 x DLC
• TResponse_Nominal = 10 x NData
• TFrame_Maximum = 1.4 x (34 + 10 x (DLC + 1) + 1)
• TFrame_Maximum = 63 + 14 x DLC
• Write a one to CR.TXEN and CR.RXEN to enable both transmitter and receiver
• Select LIN mode and master node by writing to MR.MODE
• Configure the baud rate by writing to CD and FP in BRGR
• Configure the frame transfer by writing to NACT, PARDIS, CHKDIS, CHKTYPE, DLCM,
• Check that CSR.TXRDY is one
• Send the header by writing to LINIR.IDCHR
FSDIS, and DLC in LINMR
The term “+1” leads to an integer result for TFrame_Max (LIN Specification 1.3)
ATUC64/128/256L3/4U
(Note:)
455

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