ATUC128L4U Atmel Corporation, ATUC128L4U Datasheet - Page 254

• Manufacturer Part Number: ATUC128L4U
• Manufacturer: Atmel Corporation

Specifications of ATUC128L4U

• Flash (kbytes): 128 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 50 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 36
• Ext Interrupts: 36
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 460
• Analog Comparators: 8
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.62 to 3.6
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 35
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

14.5.4.10
14.5.5
32142A–12/2011
Brown-Out Detection (BOD)
Interrupts
A interrupt can be generated on a zero-to-one transaction on DFLLnLOCKC, DFLLnLOCKF,
DFLLnLOCKA, DFLLnLOCKLOSTC, DFLLnLOCKLOSTF, DFLLnLOCKLOSTA, DFLLnRDY or
DFLLnRCS.
Rev: 1.2.0.0
The Brown-Out Detector monitors the VDDCORE supply pin and compares the supply voltage
to the brown-out detection level.
The BOD is disabled by default, and is enabled by writing to the BOD Control field in the BOD
Control Register (BOD.CTRL). This field can also be updated by flash fuses.
The BOD is powered by VDDIO and will not be powered during Shutdown sleep mode.
To prevent unexpected writes to the BOD register due to software bugs, write access to this reg-
ister is protected by a locking mechanism. For details please refer to the UNLOCK register
description.
To prevent further modifications by software, the content of the BOD register can be set as read-
only by writing a one to the Store Final Value bit (BOD.SFV). When this bit is one, software can
not change the BOD register content. This bit is cleared after flash calibration and after a reset
except after a BOD reset.
The brown-out detection level is selected by writing to the BOD Level field in BOD
(BOD.LEVEL). Please refer to the Electrical Characteristics chapter for parametric details.
If the BOD is enabled (BOD.CTRL is one or two) and the supply voltage goes below the detec-
tion level, the Brown-Out Detection bit in the Power and Clocks Status Register
(PCLKSR.BODDET) is set. This bit is cleared when the supply voltage goes above the detection
level. An interrupt request will be generated on a zero-to-one transition on PCLKSR.BODDET if
the Brown-Out Detection bit in the Interrupt Mask Register (IMR.BODDET) is set. This bit is set
by writing a one to the corresponding bit in the Interrupt Enable Register (IER.BODDET).
If BOD.CTRL is one, a BOD reset will be generated when the supply voltage goes below the
detection level. If BOD.CTRL is two, the device will not be reset.
Writing a one to the BOD Hysteresis bit in BOD (BOD.HYST) will add a hysteresis on the BOD
detection level.
Note that the BOD must be disabled before changing BOD.LEVEL, to avoid spurious reset or
interrupt. After enabling the BOD, the BOD output will be masked during one half of a RCSYS
clock cycle and two main clocks cycles to avoid false results.
When the JTAG or aWire is enabled, the BOD reset and interrupt are masked.
• FINE resolution: The frequency step between two FINE values. This is relatively smaller for
• Resolution of the measurement: If the resolution of the measured f
• The accuracy of the reference clock.
high output frequencies.
between CLK_DFLL frequency and CLK_DFLLIF_REF is small, then the DFLLIF might lock
at a frequency that is lower than the targeted frequency. It is recommended to use a
reference clock frequency of 32 KHz or lower to avoid this issue for low target frequencies.
ATUC64/128/256L3/4U
DFLL
is low, i.e. the ratio
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