ATUC128L4U Atmel Corporation, ATUC128L4U Datasheet - Page 531

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ATUC128L4U

Manufacturer Part Number
ATUC128L4U
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATUC128L4U

Flash (kbytes)
128 Kbytes
Pin Count
48
Max. Operating Frequency
50 MHz
Cpu
32-bit AVR
# Of Touch Channels
17
Hardware Qtouch Acquisition
Yes
Max I/o Pins
36
Ext Interrupts
36
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
460
Analog Comparators
8
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.62 to 3.6
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
35
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATUC128L4U-AUR
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATUC128L4U-AUT
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATUC128L4U-U
Manufacturer:
ATMEL
Quantity:
3 006
22.8
22.8.1
22.8.2
32142A–12/2011
Functional Description
Transfer Format
Operation
The data put on the TWD line must be 8 bits long. Data is transferred MSB first; each byte must
be followed by an acknowledgement. The number of bytes per transfer is unlimited (see
22-4).
Each transfer begins with a START condition and terminates with a STOP condition (see
22-4).
Figure 22-3.
Figure 22-4. Transfer Format
The TWIM has two modes of operation:
The master is the device which starts and stops a transfer and generates the TWCK clock.
These modes are described in the following chapters.
• A high-to-low transition on the TWD line while TWCK is high defines the START condition.
• A low-to-high transition on the TWD line while TWCK is high defines a STOP condition.
• Master transmitter mode
• Master receiver mode
TWD
TWCK
START and STOP Conditions
Start
Address
TWCK
TWD
R/W
Start
Ack
Data
ATUC64/128/256L3/4U
Ack
Data
Stop
Ack
Stop
Figure
Figure
531

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