ATUC128L4U Atmel Corporation, ATUC128L4U Datasheet - Page 819
ATUC128L4U
Manufacturer Part Number
ATUC128L4U
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.ATUC128L4U.pdf
(960 pages)
4.ATUC128L4U.pdf
(92 pages)
Specifications of ATUC128L4U
Flash (kbytes)
128 Kbytes
Pin Count
48
Max. Operating Frequency
50 MHz
Cpu
32-bit AVR
# Of Touch Channels
17
Hardware Qtouch Acquisition
Yes
Max I/o Pins
36
Ext Interrupts
36
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
460
Analog Comparators
8
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.62 to 3.6
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
35
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATUC128L4U-U
Manufacturer:
ATMEL
Quantity:
3 006
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- ATUC128L4U PDF datasheet #3
- ATUC128L4U PDF datasheet #4
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32.6.2
32.6.3
32142A–12/2011
Configuring the Lookup Table
Output Filter
The lookup table in each LUT unit can generate any logic expression OUT as a function of up to
four inputs, IN[3:0]. The truth table for the expression is written to the TRUTH register for the
LUT.
and the corresponding input and outputs will be IN[4n] to IN[4n+3] and OUTn.
Table 32-2.
By default, the output OUTn is a combinatorial function of the inputs IN[4n] to IN[4n+3]. This may
cause some short glitches to occur when the inputs change value.
It is also possible to clock the output through a filter to remove glitches. This requires that the
corresponding generic clock (GCLK) has been enabled before use. The filter can then be
enabled by writing a one to the Filter Enable (FILTEN) bit in CRn. The OUTn output will be
delayed by three to four GCLK cycles when the filter is enabled.
IN[3]
Table 32-2
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Truth Table for the Lookup Table in LUT0
shows the truth table for LUT0. The truth table for LUTn is written to TRUTHn,
IN[2]
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
IN[1]
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
IN[0]
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
ATUC64/128/256L3/4U
TRUTH0[10]
TRUTH0[11]
TRUTH0[12]
TRUTH0[13]
TRUTH0[14]
TRUTH0[15]
TRUTH0[0]
TRUTH0[1]
TRUTH0[2]
TRUTH0[3]
TRUTH0[4]
TRUTH0[5]
TRUTH0[6]
TRUTH0[7]
TRUTH0[8]
TRUTH0[9]
OUT[0]
819
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