ATUC128L4U Atmel Corporation, ATUC128L4U Datasheet - Page 444

• Manufacturer Part Number: ATUC128L4U
• Manufacturer: Atmel Corporation

Specifications of ATUC128L4U

• Flash (kbytes): 128 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 50 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 36
• Ext Interrupts: 36
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 460
• Analog Comparators: 8
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.62 to 3.6
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 35
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

20.6.3.8
32142A–12/2011
Receiver Time-out
Table 20-5.
The Time-out Value field in the Receiver Time-out Register (RTOR.TO) enables handling of vari-
able-length frames by detection of selectable idle durations on the RXD line. The value written to
TO is loaded to a decremental counter, and unless it is zero, a time-out will occur when the
amount of inactive bit periods match the initial counter value. If a time-out has not occurred, the
counter will reload and restart every time a new character arrives. A time-out sets the TIMEOUT
bit in CSR. Clearing TIMEOUT can be done in two ways:
Figure 20-12. Receiver Time-out Block Diagram
Table 20-6.
• Writing a one to the Start Time-out bit (CR.STTTO). This also aborts count down until the
• Writing a one to the Reload and Start Time-out bit (CR.RETTO). This also reloads the
RETTO
next character has been received.
counter and restarts count down immediately.
Baud Rate (bit/sec)
Baud Rate (bit/sec)
Character
Received
STTTO
115200
14400
19200
28800
33400
56000
57600
1 200
9 600
1 200
2 400
4 800
600
Maximum Baud Rate Dependent Timeguard Durations
Maximum Time-out Period
1
D
Clear
Q
Baud Rate
Clock
Clock
Bit Time (µs)
Bit time (µs)
1 667
69.4
52.1
34.7
29.9
17.9
17.4
833
104
833
417
208
8.7
16-bit Time-out
ATUC64/128/256L3/4U
Counter
TO
Load
16-bit
Value
0
Timeguard (ms)
Time-out (ms)
109 225
212.50
54 613
27 306
13 653
17.71
13.28
26.56
8.85
7.63
4.55
4.43
2.21
=
TIMEOUT
444