MCF5407CAI220 Freescale Semiconductor, MCF5407CAI220 Datasheet - Page 107
![IC MPU 32B 220MHZ COLDF 208-FQFP](/photos/12/22/122277/mcf5407cai220_sml.jpg)
MCF5407CAI220
Manufacturer Part Number
MCF5407CAI220
Description
IC MPU 32B 220MHZ COLDF 208-FQFP
Manufacturer
Freescale Semiconductor
Series
MCF540xr
Specifications of MCF5407CAI220
Core Processor
Coldfire V4
Core Size
32-Bit
Speed
220MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
DMA, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-FQFP
Processor Series
MCF540x
Core
ColdFire V4
Data Bus Width
32 bit
Program Memory Size
8 KB
Data Ram Size
4 KB
Maximum Clock Frequency
162 MHz
Number Of Programmable I/os
16
Operating Supply Voltage
1.8 V to 3.3 V
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Cpu Speed
220MHz
Embedded Interface Type
I2C, UART
Digital Ic Case Style
FQFP
No. Of Pins
208
Supply Voltage Range
3.3V
Rohs Compliant
Yes
For Use With
M5407C3 - KIT EVAL FOR MCF5407 W/ETHERNET
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5407CAI220
Manufacturer:
Freescale
Quantity:
789
Company:
Part Number:
MCF5407CAI220
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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CMPA
Operation:
Assembler Syntax: CMPA <ea>y, Ax
Attributes:
Description: Operates similarly to CMP, but is used when the destination register is an
address register rather than a data register. The operation size can be word or longword.
Word-length source operands are sign-extended to 32 bits for comparison.
Condition Codes:
Instruction Fields:
Ay (word/longword operand only)
—
X
Instruction
Format:
• Register field—Specifies the destination register.
• Opmode field:
• Effective address field specifies the source operand; use addressing modes in the
Addressing Mode
following table:
N
∗
(d
(Ay) +
– (Ay)
(Ay)
16
Dy
,Ay)
Z
∗
15
1
Operand sizes supported
V
∗
Opcode present
14
Destination – Source → cc
Size = word, long
0
CMPA
13
C
1
∗
Byte
—
Mode
000
001
010
011
100
101
12
1
X Not affected
N Set if the result is negative; cleared otherwise
Z Set if the result is zero; cleared otherwise
V Set if an overflow occurs; cleared otherwise
C Set if a borrow occurs; cleared otherwise
Chapter 2. ColdFire Core
Word
11
011
reg. number:Dy
reg. number:Ay
reg. number:Ay
reg. number:Ay
reg. number:Ay
reg. number:Ay
REGISTER
Compare Address
Register
10
ColdFire Instruction Set Architecture Enhancements
Long
111
9
V2, V3 Core
8
Yes
OPMODE
.l
Addressing Mode
Ax - <ea>y
Operation
7
(d
(d
(d
#<data>
(xxx).W
(xxx).L
8
8
16
,PC,Xi)
,Ay,Xi)
6
,PC)
5
MODE
EFFECTIVE ADDRESS
V4 Core
4
.w, .l
Yes
Mode
110
111
111
111
111
111
3
CMPA
reg. number:Ay
2
REGISTER
Register
000
001
100
010
011
1
2-41
0
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