MCF5407CAI220 Freescale Semiconductor, MCF5407CAI220 Datasheet - Page 222
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MCF5407CAI220
Manufacturer Part Number
MCF5407CAI220
Description
IC MPU 32B 220MHZ COLDF 208-FQFP
Manufacturer
Freescale Semiconductor
Series
MCF540xr
Specifications of MCF5407CAI220
Core Processor
Coldfire V4
Core Size
32-Bit
Speed
220MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
DMA, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-FQFP
Processor Series
MCF540x
Core
ColdFire V4
Data Bus Width
32 bit
Program Memory Size
8 KB
Data Ram Size
4 KB
Maximum Clock Frequency
162 MHz
Number Of Programmable I/os
16
Operating Supply Voltage
1.8 V to 3.3 V
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Cpu Speed
220MHz
Embedded Interface Type
I2C, UART
Digital Ic Case Style
FQFP
No. Of Pins
208
Supply Voltage Range
3.3V
Rohs Compliant
Yes
For Use With
M5407C3 - KIT EVAL FOR MCF5407 W/ETHERNET
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5407CAI220
Manufacturer:
Freescale
Quantity:
789
Company:
Part Number:
MCF5407CAI220
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Programming Model
6.2.5 System Protection Control Register (SYPCR)
The SYPCR, Figure 6-5, controls the software watchdog timer, timeout periods, and
software watchdog timer transfer acknowledge. The SYPCR can be read at any time, but
can be written only if a software watchdog timer IRQ is not pending. At system reset, the
software watchdog timer is disabled.
Table 6-4 describes SYPCR fields.
6-8
Bits
4–3
7
6
5
1. Disable the software watchdog timer by clearing SYPCR[SWE].
2. Reset the counter by writing 0x55 and then 0xAA to SWSR.
3. Update SYPCR[SWT,SWP].
4. Reenable the watchdog timer by setting SYPCR[SWE]. This can be done in step 3.
Address
Name
SWRI
Reset
SWE
SWP
SWT
Field
R/W
Figure 6-5. System Protection Control Register (SYPCR)
SWE
Software watchdog timer enable
0 Software watchdog timer disabled
1 Software watchdog timer enabled
Software watchdog reset/interrupt select
0 If a timeout occurs, the watchdog timer generates an interrupt to the core processor at the
1 The software watchdog timer causes soft reset to be asserted for all modules of the part
Software watchdog prescaler. This bit interacts with SYPCR[SWT].
0 Software watchdog timer clock not prescaled.
1 Software watchdog timer clock prescaled by 8192.
Software watchdog timing delay. SWT and SWP select the timeout period for the watchdog
timer. At system reset, the software watchdog timer is set to the minimum timeout period.
SWP = 0
00 2
01 2
10 2
11 2
Note that if SWP and SWT are modified to select a new software timeout, the software service
sequence must be performed (0x55 followed by 0xAA written to the SWSR) before the new
timeout period takes effect.
7
level programmed into ICR0[IL].
except for the PLL (reset mode selects, such as PP_RESET_SEL or chip-select settings,
should not change).
9
11
13
15
/system frequency
/system frequency
/system frequency
/system frequency
SWRI
Table 6-4. SYPCR Field Descriptions
6
SWP
MCF5407 User’s Manual
5
SWP = 1
00 2
01 2
10 2
11 2
MBAR + 0x01
4
0000_0000
22
24
26
28
/system frequency
/system frequency
/system frequency
/system frequency
SWT
R/W
Description
3
SWTA
2
SWTAVAL
1
—
0
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