MCF5407CAI220 Freescale Semiconductor, MCF5407CAI220 Datasheet - Page 183
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MCF5407CAI220
Manufacturer Part Number
MCF5407CAI220
Description
IC MPU 32B 220MHZ COLDF 208-FQFP
Manufacturer
Freescale Semiconductor
Series
MCF540xr
Specifications of MCF5407CAI220
Core Processor
Coldfire V4
Core Size
32-Bit
Speed
220MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
DMA, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-FQFP
Processor Series
MCF540x
Core
ColdFire V4
Data Bus Width
32 bit
Program Memory Size
8 KB
Data Ram Size
4 KB
Maximum Clock Frequency
162 MHz
Number Of Programmable I/os
16
Operating Supply Voltage
1.8 V to 3.3 V
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Cpu Speed
220MHz
Embedded Interface Type
I2C, UART
Digital Ic Case Style
FQFP
No. Of Pins
208
Supply Voltage Range
3.3V
Rohs Compliant
Yes
For Use With
M5407C3 - KIT EVAL FOR MCF5407 W/ETHERNET
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5407CAI220
Manufacturer:
Freescale
Quantity:
789
Company:
Part Number:
MCF5407CAI220
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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1
2
Output the
current PC
Read control
register
Write control
register
Read debug
module
register
Write debug
module
register
Unassigned command opcodes are reserved by Motorola. All unused command formats
within any revision level perform a
5.5.3.1 ColdFire BDM Command Format
All ColdFire Family BDM commands include a 16-bit operation word followed by an
optional set of one or more extension words, as shown in Figure 5-18.
Table 5-22 describes BDM fields.
Command
15–10 Operation Specifies the command. These values are listed in Table 5-21.
9
8
General command effect and/or requirements on CPU operation:
- Halted. The CPU must be halted to perform this command.
- Steal. Command generates bus cycles that can be interleaved with bus accesses.
- Parallel. Command is executed in parallel with CPU activity.
0x4 is a three-bit field.
15
Bit
0
R/W
Name
SYNC
RCREG
WCREG
RDMREG
WDMREG
Mnemonic
Operation
_
PC
Reserved
Direction of operand transfer.
0 Data is written to the CPU or to memory from the development system.
1 The transfer is from the CPU to the development system.
Table 5-21. BDM Command Summary (Continued)
Capture the current PC and display it on the
PSTDDATA output pins.
Read the system control register.
Write the operand data to the system control
register.
Read the debug module register.
Write the operand data to the debug module
register.
Figure 5-18. BDM Command Format
Table 5-22. BDM Field Descriptions
10
Chapter 5. Debug Support
Description
NOP
0
9
Extension Word(s)
and return the illegal command response.
R/W
8
7
Op Size
Description
6
0
5
Background Debug Mode (BDM)
Parallel
Parallel
Parallel
State
Halted
Halted
CPU
0
4
1
A/D
5.5.3.3.10 0x2980
5.5.3.3.11 0x2880
5.5.3.3.12 0x2D {0x4
5.5.3.3.13 0x2C {0x4
3
5.5.3.3.9 0x0001
Section
2
Register
DRc[4:0]}
Drc[4:0]}
Command
(Hex)
5-27
2
2
0
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