MCF5407CAI220 Freescale Semiconductor, MCF5407CAI220 Datasheet - Page 304
![IC MPU 32B 220MHZ COLDF 208-FQFP](/photos/12/22/122277/mcf5407cai220_sml.jpg)
MCF5407CAI220
Manufacturer Part Number
MCF5407CAI220
Description
IC MPU 32B 220MHZ COLDF 208-FQFP
Manufacturer
Freescale Semiconductor
Series
MCF540xr
Specifications of MCF5407CAI220
Core Processor
Coldfire V4
Core Size
32-Bit
Speed
220MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
DMA, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-FQFP
Processor Series
MCF540x
Core
ColdFire V4
Data Bus Width
32 bit
Program Memory Size
8 KB
Data Ram Size
4 KB
Maximum Clock Frequency
162 MHz
Number Of Programmable I/os
16
Operating Supply Voltage
1.8 V to 3.3 V
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Cpu Speed
220MHz
Embedded Interface Type
I2C, UART
Digital Ic Case Style
FQFP
No. Of Pins
208
Supply Voltage Range
3.3V
Rohs Compliant
Yes
For Use With
M5407C3 - KIT EVAL FOR MCF5407 W/ETHERNET
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5407CAI220
Manufacturer:
Freescale
Quantity:
789
Company:
Part Number:
MCF5407CAI220
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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SDRAM Example
The DACRs should be programmed as shown in Figure 11-27.
This configuration results in a value of DACR0 = 0xFF88_0304, as described in
Table 11-35. DACR1 initialization is not needed because there is only one block.
Subsequently, DACR1[RE,IMRS,IP] should be cleared; everything else is a don’t care.
11-36
31–18
17–16
15
14
13–12
11
10–8
7
6
5–4
3
1 Mbyte
Setting
Setting
Bits
(hex)
(hex)
Field
Field RE
31
15
0
Name
CASL
IMRS
CBM
RE
BA
PS
—
—
—
—
IP
512 Kbyte
512 Kbyte
Bank 0
—
14
X
15
Setting
0
011
00
00
0
0
0
13
CASL
Figure 11-27. DACR Register Configuration
00
1 Mbyte
Table 11-35. DACR Initialization Values
Base address. So DACR0[31–16] = 0xFF88, which places the starting address of the
SDRAM accessible memory at 0xFF88_0000.
Reserved. Don’t care.
0, which keeps auto-refresh disabled because registers are being set up at this time.
Reserved. Don’t care.
Indicates a delay of data 1 cycle after CAS is asserted
Reserved. Don’t care.
Command bit is pin 20 and bank selects are 21 and up.
Reserved. Don’t care.
Indicates
32-bit port.
Indicates precharge has not been initiated.
12
Figure 11-26. SDRAM Configuration
—
11
X
MRS
MCF5407 User’s Manual
512 Kbyte
512 Kbyte
10
command has not been initiated.
1111_1111_1000_10
Bank 1
SDRAM Component
15
3
CBM
011
BA
1 Mbyte
8
—
X
7
Description
IMRS
0
6
512 Kbyte
512 Kbyte
Bank 2
8
0
5
PS
00
4
1 Mbyte
Accessible
Memory
IP
0
3
PM
18
2
1
512 Kbyte
512 Kbyte
8
4
Bank 3
17
1
—
xx
—
xx
16
0
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