MCF5407CAI220 Freescale Semiconductor, MCF5407CAI220 Datasheet - Page 512
![IC MPU 32B 220MHZ COLDF 208-FQFP](/photos/12/22/122277/mcf5407cai220_sml.jpg)
MCF5407CAI220
Manufacturer Part Number
MCF5407CAI220
Description
IC MPU 32B 220MHZ COLDF 208-FQFP
Manufacturer
Freescale Semiconductor
Series
MCF540xr
Specifications of MCF5407CAI220
Core Processor
Coldfire V4
Core Size
32-Bit
Speed
220MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
DMA, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-FQFP
Processor Series
MCF540x
Core
ColdFire V4
Data Bus Width
32 bit
Program Memory Size
8 KB
Data Ram Size
4 KB
Maximum Clock Frequency
162 MHz
Number Of Programmable I/os
16
Operating Supply Voltage
1.8 V to 3.3 V
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Cpu Speed
220MHz
Embedded Interface Type
I2C, UART
Digital Ic Case Style
FQFP
No. Of Pins
208
Supply Voltage Range
3.3V
Rohs Compliant
Yes
For Use With
M5407C3 - KIT EVAL FOR MCF5407 W/ETHERNET
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5407CAI220
Manufacturer:
Freescale
Quantity:
789
Company:
Part Number:
MCF5407CAI220
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Revision C Debug
0xCF4x_C012 identify the MCF5407, where x identifies the core revision number (0x1 for
the initial device).
A.8 Revision C Debug
A number of enhancements to the original ColdFire debug functions were requested by
customers and third-party tool developers. As a result, an expanded set of debug functions
was implemented in the Version 4 ColdFire and named Revision C, or simply Debug C.
Most of the enhancements are included in the MCF5407 debug module and are primarily
related to improvements in the real-time debug capabilities.
A.8.1 Debug Interrupts and Interrupt Requests
In the Debug B ColdFire implementation of the MCF5307, the response to a user-defined
breakpoint trigger can be configured as one of three possibilities:
The occurrence of a debug interrupt exception is treated as a special type of interrupt. It is
considered to be higher in priority than all normal interrupt requests and has special
processor status values to indicate externally that this interrupt occurred.
Additionally, the execution of the debug interrupt service routine is forced to be
interrupt-inhibited by the processor hardware. Optionally, it is capable of mapping all
instruction and data references while in this service routine into a separate address space,
so that an emulator can define the routine dynamically.
Current processor implementations include a state bit, invisible to software, that defines this
emulator mode of operation. Note that the interrupt mask level is not modified during the
processing of a debug interrupt.
In response to customers with real-time embedded systems asking for the ability to service
normal interrupt requests while processing the debug interrupt service routine, this feature
has been incorporated in the Revision C debug. To provide this function and service any
number of normal interrupt requests, including the possibility of nested interrupts, the
processor state signaling emulator mode is now included as part of the exception stack
A-10
• The breakpoint trigger can be displayed on the PSTDDATA bus with no internal
• The breakpoint trigger can force the processor to halt and allow BDM activities.
• The breakpoint trigger can generate a special debug interrupt to allow real-time
reaction to the trigger. The trigger state information is displayed on PSTDDATA in
all situations.
systems to quickly process the interrupt and return to normal system executing as
rapidly as possible.
in Emulator Mode
MCF5407 User’s Manual
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