MCF5407CAI220 Freescale Semiconductor, MCF5407CAI220 Datasheet - Page 483
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MCF5407CAI220
Manufacturer Part Number
MCF5407CAI220
Description
IC MPU 32B 220MHZ COLDF 208-FQFP
Manufacturer
Freescale Semiconductor
Series
MCF540xr
Specifications of MCF5407CAI220
Core Processor
Coldfire V4
Core Size
32-Bit
Speed
220MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
DMA, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-FQFP
Processor Series
MCF540x
Core
ColdFire V4
Data Bus Width
32 bit
Program Memory Size
8 KB
Data Ram Size
4 KB
Maximum Clock Frequency
162 MHz
Number Of Programmable I/os
16
Operating Supply Voltage
1.8 V to 3.3 V
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Cpu Speed
220MHz
Embedded Interface Type
I2C, UART
Digital Ic Case Style
FQFP
No. Of Pins
208
Supply Voltage Range
3.3V
Rohs Compliant
Yes
For Use With
M5407C3 - KIT EVAL FOR MCF5407 W/ETHERNET
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5407CAI220
Manufacturer:
Freescale
Quantity:
789
Company:
Part Number:
MCF5407CAI220
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Note that these figures show two representative bus operations and do not attempt to show
all cases. For explanations of the states, S0–S5, see Section 18.4, “Data Transfer
Operation.” Note that Figure 20-7 does not show all signals that apply to each timing
specification. See the previous tables for a complete listing.
Figure 20-6 shows AC timings for normal read and write bus cycles.
1
2
3
4
5
6
7
8
9
10
B13
B14
B15
B16
H1
H2
Outputs that change only on rising edge of CLKIN: RSTO, TS, BR, BD, TA, R/W, SIZ[1:0], PP[7:0]
(and PP[15:8] when configured as parallel port outputs).
Outputs that can change on either CLKIN edge depending only on EDGESEL: D[31:0], A[23:0],
SCKE, SRAS, SCAS, and DRAMW and on PP[15:8] when individually configured as A[31:24]
outputs.
Outputs that can change on either CLKIN edge depending upon EDGESEL and the interface
operating mode (DRAM/SDRAM): RAS[1:0], CAS[3:0]
SRAS, SCAS, DRAMW, RAS[1:0], CAS[3:0]
D[31:0], A[23:0], TM[2:0], TT[1:0], SIZ[1:0], R/W, TIP, TS, BR, BD, and TA and PP[15:8] when
individually configured as A[31:24] outputs.
High impedance (three-state): D[31:0]
Outputs that transition to high impedance due to bus arbitration: A[23:0], R/W, SIZ[1:0], TS, AS,
and TA, and PP[15:8] when individually configured as A[31:24] outputs.
Outputs that change only on falling edge of CLKIN: AS, CS[7:0], BE[3:0], OE
SRAS, SCAS, DRAMW, RAS[1:0], CAS[3:0], AS, CS[7:0], BE[3:0], OE
D[31:0], A[23:0], TM[2:0], TT[1:0], SIZ[1:0], R/W, TIP, and TS and on PP[15:8] when individually
configured as A[31:24] outputs.
Num
2,3
2,3
8,2,3
8,2,3
Table 20-7. Output AC Timing Specification (Continued)
CLKIN rising to valid
CLKIN rising to invalid (hold)
EDGESEL to valid
EDGESEL to invalid (hold)
HIZ to high impedance
HIZ to low Impedance
Characteristic
Chapter 20. Electrical Specifications
0.5(C1) + 1.0
Min
Input/Output AC Timing Specifications
—
—
—
—
—
2
54 MHz CLKIN
0.5(C1) +10.0
0.5(C1) +8.0
Max
12
60
60
—
—
9
10
Units
nS
nS
nS
nS
nS
nS
nS
20-7
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