DF2166VT33WV Renesas Electronics America, DF2166VT33WV Datasheet - Page 117
DF2166VT33WV
Manufacturer Part Number
DF2166VT33WV
Description
MCU 16BIT FLASH 3V 512K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet
1.HS2168EPI61H-U.pdf
(876 pages)
Specifications of DF2166VT33WV
Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
106
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Price
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Part Number:
DF2166VT33WV
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Table 5.2
[Legend]]
n:
:
5.3.2
ABRKCR controls the address breaks. When both the CMF flag and BIE flag are set to 1, an
address break is requested.
Bit
7
6 to 1 —
0
Bit
7
6
5
4
3
2
1
0
Bit Name
ICRn7
ICRn6
ICRn5
ICRn4
ICRn3
ICRn2
ICRn1
ICRn0
A to D
Reserved. The write value should always be 0.
Bit Name
CMF
BIE
Address Break Control Register (ABRKCR)
Correspondence between Interrupt Source and ICR
ICRA
IRQ0
IRQ1
IRQ2, IRQ3
IRQ4, IRQ5
IRQ6, IRQ7
DTC
WDT_0
WDT_1
Initial Value
Undefined
All 0
0
ICRB
A/D converter
FRT
—
TMR_X
TMR_0
TMR_1
TMR_Y
IIC_4, IIC_5
R/W
R
R
R/W
Description
Condition Match Flag
Address break source flag. Indicates that an
address specified by BARA to BARC is prefetched.
[Clearing condition]
When an exception handling is executed for an
address break interrupt.
[Setting condition]
When an address specified by BARA to BARC is
prefetched while the BIE flag is set to 1.
Reserved
These bits are always read as 0 and cannot be
modified.
Break Interrupt Enable
Enables or disables address break.
0: Disabled
1: Enabled
Register
ICRC
SCI_0
SCI_1
SCI_2
IIC_0
IIC_1
IIC_2, IIC_3
LPC
—
Rev. 3.00, 03/04, page 75 of 830
ICRD
IRQ12 to IRQ15
—
—
—
—
—
—
IRQ8 to IRQ11
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