DF2166VT33WV Renesas Electronics America, DF2166VT33WV Datasheet - Page 502
DF2166VT33WV
Manufacturer Part Number
DF2166VT33WV
Description
MCU 16BIT FLASH 3V 512K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet
1.HS2168EPI61H-U.pdf
(876 pages)
Specifications of DF2166VT33WV
Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
106
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2166VT33WV
Manufacturer:
Renesas Electronics America
Quantity:
135
Company:
Part Number:
DF2166VT33WV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Bit
5
Rev. 3.00, 03/04, page 460 of 830
Bit Name
ICDRF
Initial
Value
0
R/W
R
Description
Receive Data Read Request Flag
Indicates the ICDR (ICDRR) status in receive mode.
0: Indicates that the data has been already read from
1: Indicates that data has been received successfully and
[Setting conditions]
•
[Clearing conditions]
•
•
When ICDRF is set due to the condition (2) above, ICDRF
is temporarily cleared to 0 when ICDR (ICDRR) is read;
however, since data is transferred from ICDRS to ICDRR
immediately, ICDRF is set to 1 again.
Note that ICDR cannot be read successfully in transmit
mode (TRS = 1) because data is not transferred from
ICDRS to ICDRR. Be sure to read data from ICDR in
receive mode (TRS = 0).
(1) When data is received successfully while ICDRF = 0
(2) When ICDR is read successfully in receive mode after
ICDR (ICDRR) or ICDR is initialized.
transferred from ICDRS to ICDRR, and the data is ready
to be read out.
When data is received successfully and transferred
from ICDRS to ICDRR.
When ICDR (ICDRR) is read.
When 0 is written to the ICE bit.
(at the rise of the 9th clock pulse).
data was received while ICDRF = 1.
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