DF2166VT33WV Renesas Electronics America, DF2166VT33WV Datasheet - Page 483
![MCU 16BIT FLASH 3V 512K 144-TQFP](/photos/28/61/286114/144-tqfp_sml.jpg)
DF2166VT33WV
Manufacturer Part Number
DF2166VT33WV
Description
MCU 16BIT FLASH 3V 512K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet
1.HS2168EPI61H-U.pdf
(876 pages)
Specifications of DF2166VT33WV
Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
106
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Part Number:
DF2166VT33WV
Manufacturer:
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DF2166VT33WV
Manufacturer:
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15.3.3
SARX sets the second slave address and selects the communication format. In slave mode,
transmit/receive operations by the DTC are possible when the received address matches the
second slave address. When the LSI is in slave mode with the I
bit is set to 0 and the upper 7 bits of SARX match the upper 7 bits of the first frame received after
a start condition, the LSI operates as the slave device specified by the master device. SARX can be
accessed only when the ICE bit in ICCR is cleared to 0.
Table 15.2 Transfer Format
Bit
7
6
5
4
3
2
1
0
SAR
FS
0
1
Bit Name
SVAX6
SVAX5
SVAX4
SVAX3
SVAX2
SVAX1
SVAX0
FSX
Second Slave Address Register (SARX)
SARX
FSX
0
1
0
1
Initial
Value
All 0
1
Operating Mode
I
•
•
I
•
•
•
I
•
•
•
Clocked synchronous serial format
•
•
2
2
2
C bus format
C bus format
C bus format
SAR and SARX slave addresses recognized
General call address recognized
SAR slave address recognized
SARX slave address ignored
General call address recognized
SAR slave address ignored
SARX slave address recognized
General call address ignored
SAR and SARX slave addresses ignored
General call address ignored
R/W Description
R/W Second Slave Address
R/W Format Select X
Set the second slave address.
Selects the communication format together with the FS bit
in SAR. Refer to table 15.2.
2
C bus format selected, if the FSX
Rev. 3.00, 03/04, page 441 of 830
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