DF2166VT33WV Renesas Electronics America, DF2166VT33WV Datasheet - Page 150
DF2166VT33WV
Manufacturer Part Number
DF2166VT33WV
Description
MCU 16BIT FLASH 3V 512K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet
1.HS2168EPI61H-U.pdf
(876 pages)
Specifications of DF2166VT33WV
Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
106
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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6.3.3
WSCR is used to specify the data bus width, the number of access states, the wait mode, and the
number of wait states for access to external address spaces (basic extended area and 256-kbyte
extended area). The bus width and the number of access states for internal memory and internal
I/O registers are fixed regardless of the WSCR settings.
Rev. 3.00, 03/04, page 108 of 830
Bit
7
6
5
Bit Name
ABW256
AST256
ABW
Wait State Control Register (WSCR)
Initial
Value
1
1
1
R/W
R/W
R/W
R/W
Description
256-kbyte Extended Area Bus Width Control
Selects the bus width for access to the 256-kbyte extended
area when the CS256E bit in SYSCR is set to 1.
0: 16-bit bus
1: 8-bit bus
256-kbyte Extended Area Access State Control
Selects the number of states for access to the 256-kbyte
extended area when the CS256E bit in SYSCR is set to 1.
This bit also enables or disables wait-state insertion.
[ADMXE = 0] Normal extension
0: 2-state access space. Wait state insertion disabled
1: 3-state access space. Wait state insertion enabled
[ADMXE = 1] Address-data multiplex extension
0: 2-state data access space. Wait state insertion disabled
1: 3-state data access space. Wait state insertion enabled
Basic Extended Area Bus Width Control
Selects the bus width for access to the basic extended area.
0: 16-bit bus
1: 8-bit bus
When the CS256E bit in SYSCR and the CPCSE bit in BCR2
are set to 1, this bit setting is ignored in 256-kbyte extended
area access and CP extended area access.
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