MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 137

• Manufacturer Part Number: MC68302EH16C
• Description: IC MPU MULTI-PROTOCOL 132-PQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68302EH16C

• Processor Type: M683xx 32-Bit
• Speed: 16MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• Ram Memory Size: 1152Byte
• Cpu Speed: 16MHz
• No. Of Timers: 3
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 16MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

L1CLK is always an input to the MC68302 in PCM highway mode and is used as both a re-
ceive and transmit clock. Thus, data is transmitted and received simultaneously in PCM
highway mode. (If receive data needs to be clocked into the MC68302 at a different time or
speed than transmit data is being clocked out, then NMSI mode should be used instead of
PCM highway.)
The two sync signals, L1SY0 and L1SY1, are also inputs to the MC68302. They select one
of three PCM channels to which data is routed or select no channel (see Table 4-3).
A PCM channel is not an SCC channel. A PCM channel is an intermediate internal channel
that can be routed to any SCC, as selected in the SIMODE register. This extra layer of indi-
rection keeps the hardware (which must generate L1SY1 and L1SY0 signals externally)
from having to be modified if a change in the SCC data routing is required.
The routing of each channel is determined in the SIMODE register by the DRB-DRA bits for
channel 1, the B1RB–B1RA bits for channel 2, and the B2RB–B2RA bits for channel 3. Once
the routing of a PCM channel is selected, data is transmitted from the selected SCC trans-
mitter over the physical interface using the L1CLK pin. At the same time, data is received
from the physical interface and routed to the selected SCC receiver. When no sync is as-
serted, the L1TXD pin is three-stated, and the L1RXD pin is ignored.
Two different methods exist for using the L1SY1–L1SY0 pins: one-clock-prior mode and en-
velope mode (see Figure 4-9). In one-clock-prior mode, the sync signals should go active
for a single clock period prior to an 8-bit time slot. In envelope mode, the sync signals should
go active on the first bit of the time slot and stay active the entire time slot. The envelope
mode is more general, allowing a time slot to be from one to N bits long.
An example of the use of the L1SY1 and L1SY0 sync signals in the envelope mode is shown
in Figure 4-10. The three PCM channels defined in the figure show some of the flexibility
available in the PCM highway envelope mode. As shown, PCM channel time slots do not
MOTOROLA
L1RXD
L1TXD
L1CLK
L1SY0
L1SY1
RTS1, RTS2, RTS3
Table 4-2. PCM Highway Mode Pin Functions
Signal
L1SY1
Table 4-3. PCM Channel Selection
0
0
1
1
MC68302 USER’S MANUAL
L1SY0
Receive Data
Transmit Data
Receive and Transmit Clock
Sync Signal 0
Sync Signal 1
Three Request-to-Send Signals
0
1
0
1
No Channel Selected
PCM Channel 1 Selected
PCM Channel 2 Selected
PCM Channel 3 Selected
Definition
Selection
Communications Processor (CP)
Input
Output
Input
Input
Input
Outputs
Function
4-17