MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 279
![IC MPU MULTI-PROTOCOL 132-PQFP](/photos/6/76/67684/mc68302eh16c_sml.jpg)
MC68302EH16C
Manufacturer Part Number
MC68302EH16C
Description
IC MPU MULTI-PROTOCOL 132-PQFP
Manufacturer
Freescale Semiconductor
Datasheets
1.MC68302AG20C.pdf
(4 pages)
2.MC68302AG20C.pdf
(2 pages)
3.MC68302AG20C.pdf
(13 pages)
4.MC68302EH16C.pdf
(481 pages)
Specifications of MC68302EH16C
Processor Type
M683xx 32-Bit
Speed
16MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-MQFP, 132-PQFP
Controller Family/series
68K
Core Size
32 Bit
Ram Memory Size
1152Byte
Cpu Speed
16MHz
No. Of Timers
3
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
16MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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- MC68302AG20C PDF datasheet
- MC68302AG20C PDF datasheet #2
- MC68302AG20C PDF datasheet #3
- MC68302EH16C PDF datasheet #4
- Current page: 279 of 481
- Download datasheet (2Mb)
These eight pins can be used either as NMSI1 in nonmultiplexed serial interface (NMSI)
mode or as an ISDN physical layer interface in IDL, GCI, and PCM highway modes. The in-
put buffers have Schmitt triggers.
Table 5-7 shows the functionality of each pin in NMSI, GCI, IDL, and PCM highway modes.
RXD1/L1RXD—Receive Data/Layer-1 Receive Data
TXD1/L1TXD—Transmit Data/Layer-1 Transmit Data
RCLK1/L1CLK—Receive Clock/Layer-1 Clock
TCLK1/L1SY0/SDS1—Transmit Clock/PCM Sync/Serial Data Strobe 1
MOTOROLA
1. In IDL and GCI mode, SDS2 is output on the PA7 pin.
2. CD1 may be used as an external sync in NMSI mode.
3. RTS is the RTS1, RTS2, or RTS3 pin according to which SCCs are connected to the PCM highway.
NOTES:
RCLK1/L1CLK
TCLK1/L1SY0
RXD1/L1RXD
Signal Name
TXD1/L1TXD
This input is used as the NMSI1 receive data in NMSI mode and as the receive data input
in IDL, GCI, and PCM modes.
This output is used as NMSI1 transmit data in NMSI mode and as the transmit data output
in IDL, GCI, and PCM modes. TXD1 may be configured as an open-drain output in NMSI
mode. L1TXD in IDL and PCM mode is a three-state output. In GCI mode, it is an open-
drain output.
This pin is used as an NMSI1 bidirectional receive clock in NMSI mode or as an input clock
in IDL, GCI, and PCM modes. In NMSI mode, this signal is an input when SCC1 is working
with an external clock and is an output when SCC1 is working with its baud rate generator.
The RCLK1 output can be three-stated by setting bit 12 in the CKCR register (see 3.9
Clock Control Register).
This pin is used as an NMSI1 bidirectional transmit clock in NMSI mode, as a sync signal
in PCM mode, or as the SDS1 output in IDL/GCI modes. In NMSI mode, this signal is an
input when SCC1 is working with an external clock and is an output when SCC1 is working
with its baud rate generator. The TCLK1 output can be three-stated by setting bit 13 in the
CKCR register (see 3.9 Clock Control Register).
CTS1/L1GR
RTS1/L1RQ
CD1/L1SY1
BRG1
I/O
I/O
O
O
O
I
I
I
NMSI1
RCLK1
TCLK1
BRG1
RXD1
TXD1
CTS1
RTS1
CD1
Table 5-7. Mode Pin Functions
MC68302 USER’S MANUAL
O
O
O
O
I
I
I
I
GCI
L1SYNC
GCIDCL
L1RXD
L1TXD
L1CLK
BRG1
SDS1
L1GR
O
O
O
O
I
I
I
I
IDL
L1SYNC
L1RXD
L1TXD
L1CLK
SDS1
L1GR
L1RQ
BRG1
Signal Description
O
O
O
I
I
I
I
PCM
L1RXD
L1TXD
L1CLK
L1SY1
L1SY0
BRG1
RTS
5-15
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