MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 150

• Manufacturer Part Number: MC68302EH16C
• Description: IC MPU MULTI-PROTOCOL 132-PQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68302EH16C

• Processor Type: M683xx 32-Bit
• Speed: 16MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• Ram Memory Size: 1152Byte
• Cpu Speed: 16MHz
• No. Of Timers: 3
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 16MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

Communications Processor (CP)
4-30
10 = Automatic echo
11 = Software operation (CTS, CD lines under software control)
for an internal clock, TCS and RCS may both be zero, or, for an external clock,
they may both be one. The other two combinations are not allowed in this mode.
In this mode, the channel automatically retransmits the received data on a bit-by-
bit basis. The receiver operates normally, but the transmitter simply retransmits
the received data. The CD pin must be asserted for the receiver to receive data,
and the CTS line is ignored. The data is echoed out the TXD pin with a few nano-
second delay from RXD. No transmit clock is required, and the ENT bit in the SCC
mode register does not have to be set.
In this mode, the CTS and CD lines are just inputs to the SCC event (SCCE) and
status (SCCS) registers. The SCC controller does not use these lines to enable/
disable reception and transmission, but leaves low (i.e., active) in this mode.
Transmission delays from RTS low are zero TCLKs (asynchronous protocols) or
one TCLK (synchronous protocols).
If external loopback is desired (i.e., external to the MC68302),
then the DIAG1–DIAG0 bits should be set for either normal or
software operation, and an external connection should be made
between the TXD and RXD pins. Clocks may be generated in-
ternally, externally, or an internally generated TCLK may be ex-
ternally connected to RCLK. If software operation is used, the
RTS, CD, and CTS pins need not be externally connected. If
normal operation is used, the RTS pin may be externally con-
nected to the CD pin, and the CTS pin may be grounded.
Do not use this mode for loopback operation of IDL in the Serial
Interface. Instead program the diag bits to Normal Operation,
and (1) assert the L1GR pin externally from the S/T chip, or (2)
configure the SDIAG1-0 bits in the SIMODE to Internal Loop-
back or Loopback Control.
The echo function may also be accomplished in software by re-
ceiving buffers from an SCC, linking them to transmit buffer de-
scriptors, and then transmitting them back out of that SCC.
The MC68302 provides several tools for enabling and disabling
transmission and/or reception. Choosing the right tool is applica-
tion and situation dependent. For the receiver, the tools are 1)
the empty bit in the receive buffer descriptor, 2) the ENR bit, and
3) the ENTER HUNT MODE command. For the transmitter, the
MC68302 USER’S MANUAL
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MOTOROLA