MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 232

• Manufacturer Part Number: MC68302EH16C
• Description: IC MPU MULTI-PROTOCOL 132-PQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68302EH16C

• Processor Type: M683xx 32-Bit
• Speed: 16MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• Ram Memory Size: 1152Byte
• Cpu Speed: 16MHz
• No. Of Timers: 3
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 16MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

OFFSET + 0
OFFSET + 2
OFFSET + 4
Communications Processor (CP)
Rx Buffer Pointer
4.5.14.11 DDCMP Transmit Buffer Descriptor (Tx BD)
Data is presented to the CP for transmission over an SCC channel by arranging it in buffers
referenced by the channel's Tx BD table. The CP confirms transmission (or indicates error
conditions) using the BDs to inform the M68000 core that the buffers have been serviced.
The Tx BD is shown in Figure 4-37.
OFFSET +6
The first word contains status and control bits. Bits 15–9 are prepared by the user before
transmission. Bits 1–0 are set by the DDCMP controller after the buffer has been transmit-
ted. Bit 15 is set by the user when the buffer and BD have been prepared and is cleared by
the DDCMP controller when the message is transmitted.
R—Ready
X—External Buffer
W—Wrap (Final BD in Table)
4-112
This pointer contains the address of the associated data buffer and may be even or odd.
The buffer may reside in either internal or external memory.
0 = This buffer is not currently ready for transmission. The user is free to manipulate
1 = The data buffer has been prepared for transmission by the user (but not yet trans-
0 = The buffer associated with this BD is in internal dual-port RAM.
1 = The buffer associated with this BD is in external memory.
0 = This is not the last BD in the Tx BD table.
1 = This is the last BD in the Tx BD table. After this buffer has been used, the DDCMP
this BD (or its associated buffer). The DDCMP controller clears this bit after the
buffer has been completely transmitted (or after an error condition is encountered).
mitted). No fields of this BD may be written by the user once this bit is set.
controller will transmit data from the first BD in the table.
15
R
For correct operation of the function codes, the upper 8 bits of
the pointer must be initialized to zero.
The user is required to set the wrap bit in one of the first eight
BDs; otherwise, errant behavior may occur.
14
X
Figure 4-37. DDCMP Transmit Buffer Descriptor
13
W
12
I
TX BUFFER POINTER (24-bits used, upper 8 bits must be 0)
11
L
MC68302 USER’S MANUAL
TC
10
OL
NOTE
NOTE
9
DATA LENGTH
—
8
—
7
—
6
—
5
—
4
—
3
—
2
MOTOROLA
UN
1
CT
0