MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 181

• Manufacturer Part Number: MC68302EH16C
• Description: IC MPU MULTI-PROTOCOL 132-PQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68302EH16C

• Processor Type: M683xx 32-Bit
• Speed: 16MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• Ram Memory Size: 1152Byte
• Cpu Speed: 16MHz
• No. Of Timers: 3
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 16MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

OFFSET + 0
OFFSET + 2
OFFSET + 4
CD—Carrier Detect Lost
Data Length
Rx Buffer Pointer
4.5.11.15 UART Transmit Buffer Descriptor (Tx BD)
Data is presented to the CP for transmission on an SCC channel by arranging it in buffers
referenced by the channel's Tx BD table. The CP confirms transmission (or indicates error
conditions) through the BDs to inform the M68000 core that the buffers have been serviced.
The Tx BD shown in Figure 4-22.
OFFSET +6
The first word of the Tx BD contains status and control bits. The following bits are prepared
by the user before transmission and set by the CP after the buffer has been transmitted.
R—Ready
MOTOROLA
The carrier detect signal was negated during message reception.
Data length contains the number of octets written by the CP into this BD's data buffer. It
is written by the CP once as the BD is closed.
The receive buffer pointer, which always points to the first location of the associated data
buffer, may be even or odd. The buffer may reside in either internal or external memory.
0 = This buffer is not currently ready for transmission. The user is free to manipulate
1 = The data buffer, which has been prepared for transmission by the user, has not
the BD (or its associated buffer). The CP clears this bit after the buffer has been
transmitted or after an error condition has been encountered.
been transmitted or is currently transmitting. No fields of this BD may be written by
the user once this bit is set.
15
R
The actual amount of memory allocated for this buffer should be
greater than or equal to the contents of maximum receive buffer
length register (MRBLR).
For correct operation of the function codes, the upper 8 bits of
the pointer must be initialized to zero.
14
X
Figure 4-22. UART Transmit Buffer Descriptor
13
W
12
I
TX BUFFER POINTER (24-bits used, upper 8 bits must be 0)
CR
11
MC68302 USER’S MANUAL
10
A
NOTE
NOTE
9
P
DATA LENGTH
—
8
—
7
—
6
Communications Processor (CP)
—
5
—
4
—
3
—
2
—
1
4-61
CT
0