L64704 LSI Logic Corporation, L64704 Datasheet - Page 134

• Manufacturer Part Number: L64704
• Description: Satellite Decoder Technical Manual 5/97
• Manufacturer: LSI Logic Corporation

Data
Figure 6.1
Synchronization
Module
6.2
Viterbi Decoder
Synchronization
6-2
Module
Viterbi
Sync
Bit Error Monitor
Out of Sync
In Sync/
Data
Decoder
Viterbi
Figure 6.1
nization module.
This section describes the first stage, or Viterbi Decoder synchronization.
Figure 6.2
In the first stage, the decoder observes the valid data symbols and bit
errors in the decoded data stream to determine the in- or out-of-
synchronization condition. The Viterbi Max Data Bit Count Registers
(VMDC1; Group 4, APR 4, and VMDC2; Group 4, APR 5:7) set the num-
ber of valid data bits at the output of the Viterbi Decoder over which the
decoder counts channel symbol errors. During that interval, whenever
the bit error count is above the value specified in the Viterbi Max Data
Bit Error Count Register (Group 4, APR 8), the synchronization logic
flags an out-of-synchronization condition.
Decoding Pipeline Synchronization
Control
Viterbi
Data
Module
RS/DI
Sync
shows the position of and major connections to the synchro-
illustrates the Viterbi Decoder synchronization process.
Out of Sync
In Sync/
Data
Configuration Parameters
Deinterleaver
Global Control
Control
Signals
DI
Data
Decoder
RS
Control
RS
Data
Description
Module
Sync
Out of Sync
In Sync/
Data
Description
Descrambler
Control
Data